| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 01/30/2003 | US20030023897 Fault-tolerant solid state memory |
| 01/30/2003 | US20030021171 Method of compensating for a defect within a semiconductor device |
| 01/30/2003 | US20030021170 Integrated dynamic memory and operating method |
| 01/30/2003 | US20030021169 Method for on-chip testing of memory cells of an integrated memory circuit |
| 01/30/2003 | US20030021150 Non-volatile semiconductor memory device |
| 01/30/2003 | US20030021149 Multi-bit-per-cell flash EEPROM memory with refresh |
| 01/30/2003 | US20030021138 256 meg dynamic random access memory |
| 01/30/2003 | US20030020095 Semiconductor integrated circuit with voltage down converter adaptable for burn-in testing |
| 01/29/2003 | EP1280205A2 Semiconductor memory device |
| 01/29/2003 | EP1280161A1 Memory devices with page buffer having dual registers and methods of using the same |
| 01/29/2003 | EP0573607B1 Redundant shift registers for scanning devices |
| 01/29/2003 | CN1393932A Semiconductor chip with fuse element |
| 01/28/2003 | US6513138 Pattern generator for semiconductor test system |
| 01/28/2003 | US6513130 Circuits, systems, and methods for accounting for defective cells in a memory device |
| 01/28/2003 | US6513081 Memory device which receives an external reference voltage signal |
| 01/28/2003 | US6512717 Semiconductor memory device having a relaxed pitch for sense amplifiers |
| 01/28/2003 | US6512715 Semiconductor memory device operating with low power consumption |
| 01/28/2003 | US6512710 Reliability test method and circuit for non-volatile memory |
| 01/28/2003 | US6512709 Semiconductor integrated circuit |
| 01/28/2003 | US6512707 Semiconductor integrated circuit device allowing accurate evaluation of access time of memory core contained therein and access time evaluating method |
| 01/28/2003 | US6512698 Semiconductor device |
| 01/28/2003 | US6512692 Nonvolatile semiconductor storage device and test method therefor |
| 01/28/2003 | US6512686 Ferroelectric storage device and test method thereof |
| 01/23/2003 | US20030018944 Semiconductor integrated circuit including circuit for selecting embedded tap cores |
| 01/23/2003 | US20030018939 Test circuit capable of testing embedded memory with reliability |
| 01/23/2003 | US20030018935 Semiconductor memory, memory device, and memory card |
| 01/23/2003 | US20030018934 Data generator for generating test data for word-oriented semiconductor memories |
| 01/23/2003 | US20030016578 Test of a semiconductor memory having a plurality of memory banks |
| 01/23/2003 | US20030016577 6f2 dram array with apparatus for stress testing an isolation gate and method |
| 01/23/2003 | US20030016570 Semiconductor integrated circuit |
| 01/23/2003 | US20030016566 Semiconductor device, microcomputer and flash memory |
| 01/23/2003 | US20030016562 Memory devices with page buffer having dual registers and methods of using the same |
| 01/23/2003 | US20030016560 Semiconductor memory and method of driving semiconductor memory |
| 01/23/2003 | US20030016040 Motherboard memory slot ribbon cable and methods, apparatus and systems employing same |
| 01/23/2003 | US20030015735 Semiconductor memory device having cell plate electrodes allowing independent power supply for each redundant replacement unit |
| 01/23/2003 | US20030015733 Multichip semiconductor device |
| 01/23/2003 | DE10124742C1 Verfahren und Einrichtung zum Testen einer Speicherschaltung Method and device for testing a memory circuit |
| 01/22/2003 | EP1278204A2 Semiconductor integrated circuit |
| 01/22/2003 | EP1278200A2 Semiconductor memory and method of driving semiconductor memory |
| 01/22/2003 | EP0919917B1 Method to test the buffer memory of a microprocessor system |
| 01/22/2003 | CN1392569A Semiconductor storage and its ageing sieving method |
| 01/22/2003 | CN1392566A Semiconductor storage working at low power consumption |
| 01/21/2003 | US6510537 Semiconductor memory device with an on-chip error correction circuit and a method for correcting a data error therein |
| 01/21/2003 | US6510534 Method and apparatus for testing high performance circuits |
| 01/21/2003 | US6510533 Method for detecting or repairing intercell defects in more than one array of a memory device |
| 01/21/2003 | US6510530 At-speed built-in self testing of multi-port compact sRAMs |
| 01/21/2003 | US6510443 Processing semiconductor devices having some defective input-output pins |
| 01/21/2003 | US6510102 Method for generating memory addresses for accessing memory-cell arrays in memory devices |
| 01/21/2003 | US6510072 Nonvolatile ferroelectric memory device and method for detecting weak cell using the same |
| 01/21/2003 | US6510071 Ferroelectric memory having memory cell array accessibility safeguards |
| 01/21/2003 | US6509756 Method and apparatus for low capacitance, high output impedance driver |
| 01/21/2003 | US6509598 Semiconductor memory device having a redundant block and reduced power consumption |
| 01/16/2003 | WO2003005050A1 Method and apparatus for optimized parallel testing and access of electronic circuits |
| 01/16/2003 | WO2002025296A3 Method and system for wafer and device-level testing of an integrated circuit |
| 01/16/2003 | US20030014702 Apparatus and method for testing a device for storing data |
| 01/16/2003 | US20030014701 Rom automatic burning device |
| 01/16/2003 | US20030014689 Flash EEprom system |
| 01/16/2003 | US20030014686 Memory BIST and repair |
| 01/16/2003 | US20030014205 Methods and apparatus for semiconductor testing |
| 01/16/2003 | US20030013249 Semiconductor wafer, semiconductor chip, semiconductor device and method for manufacturing semiconductor device |
| 01/16/2003 | US20030012071 Methods of rerouting dies using antifuses |
| 01/16/2003 | US20030012069 Package map data outputting circuit of semiconductor memory device and method for outputting package map data |
| 01/16/2003 | US20030012068 Semiconductor storage device |
| 01/16/2003 | US20030012067 Method and apparatus for identifying SRAM cells having weak pull-up PFETs |
| 01/16/2003 | US20030012066 Memory and method for replacing defective memory cells in the same |
| 01/16/2003 | US20030012059 Semiconductor integrated circuit device having spare word lines |
| 01/16/2003 | US20030012046 Apparatus for controlling input termination of semiconductor memory device and method for the same |
| 01/16/2003 | US20030011417 Delay time controlling circuit and method for controlling delay time |
| 01/16/2003 | US20030011379 Method for characterizing an active track and latch sense-amp (comparator) in a one time programmable (OTP) salicided poly fuse array |
| 01/16/2003 | US20030011313 Power supply control circuit for use in semiconductor storage device |
| 01/16/2003 | US20030011004 Semiconductor integrated circuit |
| 01/16/2003 | DE10125164C1 Halbleiter-Chip mit trimmbarem Oszillator Semiconductor chip oscillator trimmbarem |
| 01/15/2003 | CN1099118C Semi-conductor memory device and its testing circuit, memory device system and data transmission system |
| 01/14/2003 | US6507924 Method and apparatus for testing SRAM memory cells |
| 01/14/2003 | US6507917 Data memory |
| 01/14/2003 | US6507900 Semiconductor memory device including plural blocks with selecting and sensing or reading operations in different blocks carried out in parallel |
| 01/14/2003 | US6507801 Semiconductor device testing system |
| 01/14/2003 | US6507532 Semiconductor memory device having row-related circuit operating at high speed |
| 01/14/2003 | US6507524 Integrated circuit memory having column redundancy |
| 01/14/2003 | US6507518 Fail number detecting circuit of flash memory |
| 01/14/2003 | US6507512 Circuit configuration and method for accelerating aging in an MRAM |
| 01/14/2003 | US6507183 Method and a device for measuring an analog voltage in a non-volatile memory |
| 01/14/2003 | US6506634 Semiconductor memory device and method for producing same |
| 01/09/2003 | WO2003003379A1 Non-volatile memory and accelerated test method for address decoder by added modified dummy memory cells |
| 01/09/2003 | WO2003003208A1 Device for and method of storing identification data in an integrated circuit |
| 01/09/2003 | US20030009721 Method and system for background ECC scrubbing for a memory array |
| 01/09/2003 | US20030009715 Method and apparatus for optimized parallel testing and access of electronic circuits |
| 01/09/2003 | US20030009713 Semiconductor device capable of easily setting test mode during test conducted by applying high voltage |
| 01/09/2003 | US20030009712 Test bus architecture for embedded RAM and method of operating same |
| 01/09/2003 | US20030009615 Integrated redundancy architecture system for an embedded dram |
| 01/09/2003 | US20030008446 Semiconductor integrated circuit with memory redundancy circuit |
| 01/09/2003 | US20030007413 Semiconductor memory and burn-in method for the same |
| 01/09/2003 | US20030007410 Semiconductor memory device having error correction function for data reading during refresh operation |
| 01/09/2003 | US20030007400 Weak bit testing |
| 01/09/2003 | US20030007399 Semiconductor memory |
| 01/09/2003 | US20030007393 Method and apparatus for testing memory arrays |
| 01/09/2003 | US20030007385 Non-volatile semiconductor memory |
| 01/09/2003 | US20030007384 Nonvolatile semiconductor memory device |
| 01/09/2003 | US20030007296 Semiconductor integrated circuit device with internal power supply potential generation circuit |
| 01/09/2003 | US20030006466 Semiconductor integrated circuit |