Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
02/2003
02/20/2003US20030034544 Microcomputer
02/19/2003EP1284498A2 System and method to screen defect related reliability failures in CMOS SRAMS
02/19/2003CN1398431A Semiconductor device
02/19/2003CN1398407A 半导体集成电路器件 The semiconductor integrated circuit device
02/19/2003CN1397951A Semiconductor storage and method of driving same
02/18/2003US6523145 Method and apparatus for testing a contents-addressable-memory-type structure using a simultaneous write-thru mode
02/18/2003US6523144 Intelligent binning for electrically repairable semiconductor chips and method
02/18/2003US6523143 Memory testing apparatus
02/18/2003US6523135 Built-in self-test circuit for a memory device
02/18/2003US6523132 Flash EEprom system
02/18/2003US6523049 Circuit and method for determining greater than or equal to three out of sixty-six
02/18/2003US6522598 Synchronous semiconductor memory device having improved operational frequency margin at data input/output
02/18/2003US6522595 Methods for forming and programming aligned fuses disposed in an integrated circuit
02/18/2003US6522591 Semiconductor memory circuit
02/18/2003US6522590 Semiconductor memory device
02/18/2003US6522567 Semiconductor memory device and semiconductor integrated device using the same
02/18/2003US6521958 MOSFET technology for programmable address decode and correction
02/13/2003WO2003012796A2 Method for sharing redundant rows between banks for improved repari efficiency
02/13/2003US20030033573 Memory card and memory controller
02/13/2003US20030033572 Memory system and method of using same
02/13/2003US20030033567 Memory card and memory controller
02/13/2003US20030033566 Internal cache for on chip test data storage
02/13/2003US20030033561 Apparatus for testing memories with redundant storage elements
02/13/2003US20030033557 Semiconductor memory testing device
02/13/2003US20030033471 Window-based flash memory storage system and management and access methods thereof
02/13/2003US20030031082 Clock synchronous semiconductor memory device
02/13/2003US20030031075 Semiconductor integrated circuit device and method of manufacturing thereof
02/13/2003US20030031069 Semiconductor memory device capable of applying stress voltage to bit line pair
02/13/2003US20030031063 Semiconductor integrated circuit and electronic apparatus including the same
02/13/2003US20030031061 Circuit and method for repairing column in semiconductor memory device
02/13/2003US20030031051 Non-volatile memory
02/13/2003US20030031049 Nonvolatile semiconductor memory device having electrically and collectively erasable characteristics
02/13/2003US20030031039 Method and apparatus for adjusting control circuit pull-up margin for content addressable memory (CAM)
02/13/2003US20030030135 Semiconductor device that can have a defective bit found during or after packaging process repaired
02/13/2003US20030030073 Semiconductor integrated circuit device
02/12/2003EP0859317B1 Method for protecting information in printing apparatus
02/12/2003CN1396658A 半导体集成电路 The semiconductor integrated circuit
02/12/2003CN1396599A Semiconductor memory device for reading data and error correction in refresh operating procedure
02/11/2003US6519726 Semiconductor device and testing method of the same
02/11/2003US6519725 Diagnosis of RAMS using functional patterns
02/11/2003US6519719 Method and apparatus for transferring test data from a memory array
02/11/2003US6519716 Electronic device initialization with dynamic selection of access time for non-volatile memory
02/11/2003US6519202 Method and apparatus to change the amount of redundant memory column and fuses associated with a memory device
02/11/2003US6519194 Semiconductor memory device with a rapid packet data input, capable of operation check with low speed tester
02/11/2003US6519193 Semiconductor integrated circuit device having spare word lines
02/11/2003US6519192 Semiconductor memory device having a large band width and allowing efficient execution of redundant repair
02/11/2003US6519185 Flash EEprom system
02/11/2003US6519171 Semiconductor device and multichip module
02/11/2003US6518746 Integrated circuit device having a burn-in mode for which entry into and exit from can be controlled
02/11/2003US6518073 Method for testing semiconductor memory devices, and apparatus and system for testing semiconductor memory devices
02/06/2003WO2003010775A1 Nonvolatile memory
02/06/2003US20030028835 Semiconductor integrated circuit
02/06/2003US20030028834 Method for sharing redundant rows between banks for improved repair efficiency
02/06/2003US20030028826 System and method for developing customized integration tests and network peripheral device evaluations
02/06/2003US20030028712 Semiconductor memory
02/06/2003US20030028710 Semiconductor memory
02/06/2003US20030028704 Memory controller, flash memory system having memory controller and method for controlling flash memory device
02/06/2003US20030028342 Method for the defect analysis of memory modules
02/06/2003US20030026162 Calibration method and memory system
02/06/2003US20030026161 Semiconductor memory
02/06/2003US20030026148 Method and apparatus for testing a CAM addressed cache
02/06/2003US20030026147 Fuse box including make-link and redundant address decoder having the same, and method for repairing defective memory cell
02/06/2003US20030026143 Method for automating the construction of data stores for storing complex relational and hierarchical data and optimising the access and update of the data therein method for defining look and feel of a user interface obviating the requirement to write programming language code
02/06/2003US20030026142 Semiconductor memory having a defective memory cell relieving circuit
02/06/2003US20030026140 Semiconductor memory having multiple redundant columns with offset segmentation boundaries
02/06/2003US20030026139 Semiconductor module including semiconductor memory device shiftable to test mode as well as semiconductor memory device used therein
02/06/2003US20030026136 Semiconductor memory device and method for testing the same
02/06/2003US20030026135 Data-shifting scheme for utilizing multiple redundant elements
02/06/2003US20030026131 Redundancy circuit and method for replacing defective memory cells in a flash memory device
02/06/2003US20030026129 Redundancy circuit and method for flash memory devices
02/06/2003US20030026119 Semiconductor integrated circuit device having internal synchronizing circuit responsive to test mode signal
02/06/2003US20030025730 Method for defining look and feel of a user interface obviating the requirement to write programming language code
02/06/2003US20030025191 Semiconductor wiring substrate, semiconductor device, method for testing semiconductor device, and method for mounting semiconductor device
02/05/2003EP1282138A1 Redundancy circuit and method for flash memory devices
02/05/2003EP1282137A1 Redundancy circuit and method for replacing defective memory cells in a flash memory device
02/05/2003EP1282133A1 Semiconductor memory
02/05/2003EP1282040A2 Data storage method for use in a magnetoresistive solid-state storage device
02/04/2003US6516431 Semiconductor device
02/04/2003US6516430 Test circuit for semiconductor device with multiple memory circuits
02/04/2003US6516256 Apparatus for storing data in a motor vehicle
02/04/2003US6515937 Test circuit for testing semiconductor memory
02/04/2003US6515933 Semiconductor device and semiconductor storage device testing method
02/04/2003US6515928 Semiconductor memory device having a plurality of low power consumption modes
02/04/2003US6515923 Memory array organization and related test method particularly well suited for integrated circuits having write-once memory arrays
02/04/2003US6515922 Memory module
02/04/2003US6515921 Semiconductor storage device having redundancy circuit for replacement of defect cells under tests
02/04/2003US6515920 Semiconductor data storing circuit device, method of checking the device and method of relieving the device from defective cell
02/04/2003US6515905 Nonvolatile semiconductor memory device having testing capabilities
01/2003
01/30/2003WO2003009304A2 Duty-cycle-efficient sram cell test
01/30/2003US20030023932 Method and apparatus for parity error recovery
01/30/2003US20030023928 Manufacturing test for a fault tolerant magnetoresistive solid-state storage device
01/30/2003US20030023927 Method for error correction decoding in a magnetoresistive solid-state storage device
01/30/2003US20030023926 Magnetoresistive solid-state storage device and data storage methods for use therewith
01/30/2003US20030023925 Manufacturing test for a fault tolerant magnetoresistive solid-state storage device
01/30/2003US20030023924 Data storage method for use in a magnetoresistive solid-state storage device
01/30/2003US20030023923 Error correction coding and decoding in a solid-state storage device
01/30/2003US20030023922 Fault tolerant magnetoresistive solid-state storage device
01/30/2003US20030023911 Method for error correction decoding in an MRAM device (historical erasures)
01/30/2003US20030023909 Interleave address generator
01/30/2003US20030023902 Recording test information to identify memory cell errors