Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
03/2003
03/27/2003DE19830571C2 Integrierte Schaltung Integrated circuit
03/26/2003CN1405890A Nonvolatile semiconductor memory device and its imperfect repairing method
03/26/2003CN1405889A 同步型半导体存储装置 Synchronous type semiconductor memory device
03/26/2003CN1405886A 半导体器件 Semiconductor devices
03/26/2003CN1405783A Method for proving non-volatile internal memory reliability and circuit
03/26/2003CN1405782A Nonvolatile internal storage acceleration test method and circuit
03/26/2003CN1405781A Nonvolatile internal storage reliability test method and circuit
03/26/2003CN1405681A System and method for developing custom-made identification of integrated testing and network peripheral equipment
03/25/2003US6539506 Read/write memory with self-test device and associated test method
03/25/2003US6539505 Method of testing a semiconductor memory, and semiconductor memory with a test device
03/25/2003US6539503 Method and apparatus for testing error detection
03/25/2003US6539453 Storage system including means for management of a memory with anti-attrition, and process of anti-attrition management of a memory
03/25/2003US6539452 Semiconductor redundant memory provided in common
03/25/2003US6539324 Semiconductor device and semiconductor device testing method
03/25/2003US6538953 Semiconductor memory device
03/25/2003US6538949 Device and method for repairing a memory array by storing each bit in multiple memory cells in the array
03/25/2003US6538940 Method and circuitry for identifying weak bits in an MRAM
03/25/2003US6538939 Memory employing multiple enable/disable modes for redundant elements and testing method using same
03/25/2003US6538938 Method for generating memory addresses for accessing memory-cell arrays in memory devices
03/25/2003US6538937 Nonvolatile semiconductor memory test circuit and method, nonvolatile semiconductor memory and method for fabricating nonvolatile semiconductor memory
03/25/2003US6538936 Semiconductor integrated circuit having test circuit
03/25/2003US6538935 Semiconductor memory device enabling reliable stress test after replacement with spare memory cell
03/25/2003US6538934 Semiconductor device
03/25/2003US6538933 High speed semiconductor memory device with short word line switching time
03/25/2003US6538931 Methods of operating an integrated circuit with memory having an internal circuit for the generation of a programming high voltage
03/25/2003US6538924 Semiconductor integrated circuit
03/25/2003US6538922 Writable tracking cells
03/20/2003WO2003023770A1 Error correction code circuits
03/20/2003WO2003023358A2 Methods and apparatus for testing electronic circuits
03/20/2003WO2002069347A3 Flash cell fuse circuit
03/20/2003US20030056183 Scan test circuit, and semiconductor integrated circuit including the circuit
03/20/2003US20030056162 Method for testing a circuit unit to be tested and test apparatus
03/20/2003US20030056161 Memory circuit scan arrangement
03/20/2003US20030056160 Detecting and mitigating memory device latchup in a data processor
03/20/2003US20030056148 Integrated circuit and method for operating the integrated circuit
03/20/2003US20030053471 Circuit configuration for receiving a data signal
03/20/2003US20030053362 Synchronous semiconductor memory device
03/20/2003US20030053359 Wafer burn-in test and wafer test circuit
03/20/2003US20030053358 Dft technique for avoiding contention/conflict in logic built-in self-test
03/20/2003US20030053354 Method for operating a semiconductor memory and semiconductor memory
03/20/2003US20030053353 Method for testing integrated semiconductor memory devices
03/20/2003US20030053348 Flash memory array architecture
03/20/2003US20030053328 Column repair circuit in ferroelectric memory
03/20/2003US20030052344 Evaluation configuration for semiconductor memories
03/19/2003EP1293989A2 Test method for semiconductor memory circuit
03/19/2003EP1293984A2 Synchronous semiconductor memory device
03/19/2003EP1293938A2 Binary counter with permuted storage
03/19/2003EP1292952A2 Semiconductor memory having segmented row repair
03/19/2003EP1292889A1 Secure eeprom comprising an error correction circuit
03/19/2003EP0833249B1 Semiconductor integrated circuit with error detecting circuit
03/19/2003EP0806773B1 Electrically erasable and programmable non-volatile memory device with testable redundancy circuits
03/19/2003CN1404151A Nonvolatile semiconductor memory
03/19/2003CN1404123A Semiconductor device and checkup apparatus thereof
03/19/2003CN1404066A Thin film magnetic storing device containing storage unit with magnetic tunel junction
03/19/2003CN1404065A 存储电路 The memory circuit
03/19/2003CN1403828A Measurer of high-speed memory bus
03/18/2003US6536005 High-speed failure capture apparatus and method for automatic test equipment
03/18/2003US6536004 On-chip circuit and method for testing memory devices
03/18/2003US6536003 Testable read-only memory for data memory redundant logic
03/18/2003US6536002 Buffered redundancy circuits for integrated circuit memory devices
03/18/2003US6535999 Test and observe mode for embedded memory
03/18/2003US6535993 Testing apparatus for semiconductor memory device
03/18/2003US6535986 Optimizing performance of a clocked system by adjusting clock control settings and clock frequency
03/18/2003US6535455 Fault-tolerant neighborhood-disjoint address logic for solid state memory
03/18/2003US6535452 Semiconductor memory device having error correction function for data reading during refresh operation
03/18/2003US6535442 Semiconductor memory capable of debugging an incorrect write to or an incorrect erase from the same
03/18/2003US6535441 Static semiconductor memory device capable of accurately detecting failure in standby mode
03/18/2003US6535440 Apparatus and method for package level burn-in test in semiconductor device
03/18/2003US6535439 Full stress open digit line memory device
03/18/2003US6535438 Semiconductor memory device adopting redundancy system
03/18/2003US6535437 Block redundancy in ultra low power memory circuits
03/18/2003US6535436 Redundant circuit and method for replacing defective memory cells in a memory device
03/18/2003US6535421 Nonvolatile semiconductor memory having a voltage selection circuit
03/18/2003US6535412 Semiconductor memory device capable of switching output data width
03/18/2003US6535007 Component holder for testing devices and component holder system microlithography
03/13/2003WO2003021604A2 Method and device for testing semiconductor memory devices
03/13/2003WO2003021599A1 Memory using error-correcting codes to correct stored data in background
03/13/2003WO2002039459A3 System for communicating with synchronous device
03/13/2003US20030051199 Semiconductor integrated circuit device, method of manufacturing the device, and computer readable medium
03/13/2003US20030051198 Electronic circuit and method for testing
03/13/2003US20030051197 Cache memory self test
03/13/2003US20030051196 Graphical system and automated pattern generator for testing arrays
03/13/2003US20030051118 Address converter apparatus and method to support various kinds of memory chips and application system thereof
03/13/2003US20030051098 Modular RAID controller
03/13/2003US20030051091 Latched sense amplifiers as high speed memory in a memory system
03/13/2003US20030048691 Semiconductor memory device that operates in synchronization with a clock signal
03/13/2003US20030048687 Nonvolatile semiconductor memory device having electrically and collectively erasable characteristics
03/13/2003US20030048685 Testmode to increase accleration in burn-in
03/13/2003US20030048680 Semiconductor memory device having a plurality of signal lines for writing and reading data
03/13/2003US20030048678 Semiconductor memory device
03/13/2003US20030048673 Test mode decoder in a flash memory
03/13/2003US20030048672 On chip scrambling
03/13/2003US20030048665 Electronic circuit and method for testing and refreshing non-volatile memory
03/13/2003US20030047756 Programmable memory address and decode circuits with ultra thin vertical body transistors
03/13/2003US20030047731 Semiconductor device and test device for same
03/12/2003EP1291882A2 Memory chip and logic chip in same package
03/12/2003EP1291778A2 Method and apparatus for coordinating memory operations among diversely-located memory components
03/12/2003EP1290559A2 Dual-ported cams for a simultaneous operation flash memory
03/12/2003CN1402873A Semiconductor storage and method for testing same
03/12/2003CN1402259A Calibrating method and memory system
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