Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
03/2003
03/12/2003CN1402258A Semiconductor memory device power controlling method and semiconductor memory device
03/12/2003CN1402255A 半导体存储器 Semiconductor memory
03/12/2003CN1103080C Single chip microprocessor with improved detectable inner mounted electrisity, erasable, programmable read-only memory
03/11/2003US6532579 Semiconductor integrated circuit and design method and manufacturing method of the same
03/11/2003US6532187 Semiconductor device having integrated memory and logic
03/11/2003US6532184 Precharge control signal generator, and semiconductor memory device using the same
03/11/2003US6532183 Semiconductor device capable of adjusting internal potential
03/11/2003US6532182 Semiconductor memory production system and semiconductor memory production method
03/11/2003US6532181 Semiconductor memory device having redundant circuitry for replacing defective memory cell
03/11/2003US6532174 Semiconductor memory device having high speed data read operation
03/11/2003US6531773 Semiconductor device
03/11/2003US6531339 Redundancy mapping in a multichip semiconductor package
03/06/2003WO2003019574A2 Method for the high-voltage screening of an integrated circuit
03/06/2003WO2003005050B1 Method and apparatus for optimized parallel testing and access of electronic circuits
03/06/2003US20030046632 Memory circuit
03/06/2003US20030046631 Error correction scheme for use in flash memory allowing bit alterability
03/06/2003US20030046630 Memory using error-correcting codes to correct stored data in background
03/06/2003US20030046621 Creation of memory array bitmaps using logical to physical server
03/06/2003US20030046620 Method of testing cache memory
03/06/2003US20030046603 Flash EEprom system
03/06/2003US20030046480 Integrated circuit with programmable locking circuit
03/06/2003US20030045026 Method and apparatus for circuit completion through the use of ball bonds or other connections during the formation of semiconductor device
03/06/2003US20030043748 Data capture circuit with self-test capability
03/06/2003US20030043680 Semiconductor memory circuit
03/06/2003US20030043672 Semiconductor memory
03/06/2003US20030043664 Test circuit device capable of identifying error in stored data at memory cell level and semiconductor integrated circuit device including the same
03/06/2003US20030043663 Semiconductor test circuit for testing a semiconductor memory device having a write mask function
03/06/2003US20030043662 Sector synchronized test method and circuit for memory
03/06/2003US20030043661 Non-volatile memory with test rows for disturb detection
03/06/2003US20030043656 Multiple bit line column redundancy
03/06/2003US20030043652 Programmed value determining circuit, semiconductor integrated circuit device including the same, and method for determining programmed value
03/06/2003US20030043651 Semiconductor storage device and setting method thereof
03/06/2003US20030043648 Semiconductor memory device capable of testing data line redundancy replacement circuit
03/06/2003US20030043647 Non-volatile semiconductor memory device
03/06/2003US20030043626 Flash memory
03/06/2003US20030043620 Thin-film magnetic memory device with memory cells having magnetic tunnel junction
03/06/2003US20030043612 Semiconductor device whereon memory chip and logic chip are mounted, making testing of memory chip possible
03/06/2003US20030042523 Semiconductor integrated circuit device having link element
03/06/2003US20030042485 Semiconductor integrated circuit device capable of tuning of internal power supply voltages generated by a plurality of internal power generating circuits
03/05/2003EP1288968A2 Solid state memory
03/05/2003EP1288967A2 Semiconductor memory
03/05/2003EP1288961A2 Semiconductor memory
03/05/2003EP1131645B1 A skew calibration means and method of skew calibration
03/04/2003US6530052 Method and apparatus for looping back a current state to resume a memory built-in self-test
03/04/2003US6530046 Circuit, semiconductor device and method for enhancing test efficiency of function modules
03/04/2003US6530045 Apparatus and method for testing rambus DRAMs
03/04/2003US6530040 Parallel test in asynchronous memory with single-ended output path
03/04/2003US6530038 Streamlined initialization and refresh of file system directory limits
03/04/2003US6529438 Semiconductor memory device implemented with a test circuit
03/04/2003US6529430 Built-in programmable self-diagnostic circuit for SRAM unit
03/04/2003US6529428 Multi-bit parallel testing for memory devices
03/04/2003US6529427 Test structures for measuring DRAM cell node junction leakage current
03/04/2003US6529426 Circuit and method for varying a period of an internal control signal during a test mode
03/04/2003US6529420 Redundant decoder circuit
03/04/2003US6529419 Apparatus for varying data input/output path in semiconductor memory device
03/04/2003US6529408 Semiconductor storage device and method for evaluating the same
03/04/2003US6529407 Semiconductor device with improved latch arrangement
03/04/2003US6529031 Integrated circuit configuration for testing transistors, and a semiconductor wafer having such a circuit configuration
03/04/2003US6529028 Configuration for testing a plurality of memory chips on a wafer
03/04/2003US6528817 Semiconductor device and method for testing semiconductor device
02/2003
02/27/2003WO2003016922A2 Electronic circuit and method for testing
02/27/2003US20030041299 Memory controller for multilevel cell memory
02/27/2003US20030041298 Emulation system for evaluating digital data channel configurations
02/27/2003US20030041295 Method of defects recovery and status display of dram
02/27/2003US20030039159 Asynchronous, high-bandwidth memory component using calibrated timing elements
02/27/2003US20030039157 Digital memory circuit and method of manufacturing the circuit
02/27/2003US20030039156 Method for testing memory units to be tested and test device
02/27/2003US20030039155 Integrated memory with memory cells in a plurality of memory cell blocks, and method of operating such a memory
02/27/2003US20030039150 Asynchronous, high-bandwidth memory component using calibrated timing elements
02/27/2003US20030039139 Nonvolatile semiconductor memory device having electrically and collectively erasable characteristics
02/27/2003US20030038653 Semiconductor integrated circuit device including logic gate that attains reduction of power consumption and high-speed operation
02/27/2003US20030038257 Method of analyzing dram redundancy repair
02/26/2003EP1286360A2 Manufacturing test for a fault tolerant magnetoresistive solid-state storage device
02/26/2003EP1286359A2 Memory controller for multilevel cell memory
02/26/2003EP1286358A1 Weak bit testing
02/26/2003EP1285443A1 Integrated circuit containing sram memory and method of testing same
02/26/2003CN1399281A Fault-tolerant solid memory
02/26/2003CN1399279A Memory equipment having page buffer storage with double-register and its use thereof
02/26/2003CN1102291C Semiconductor memory device and data writing method thereof
02/25/2003US6525987 Dynamically configured storage array utilizing a split-decoder
02/25/2003US6525983 Device and method for reducing standby current in a memory device by disconnecting bit line load devices in unused columns of the memory device from a supply voltage
02/25/2003US6525978 Circuit configuration for evaluating the information content of a memory cell
02/25/2003US6525974 Integrated memory with redundancy
02/25/2003US6525973 Automatic bitline-latch loading for flash prom test
02/25/2003US6525963 Programmable read-only memory and method for operating the read-only memory
02/25/2003US6525528 ROM automatic burning device
02/20/2003WO2002091111A3 Parity mirroring between controllers in an active-active controller pair
02/20/2003US20030037299 Dynamic variable-length error correction code
02/20/2003US20030037295 Non-volatile memory device with self test
02/20/2003US20030037278 System and method for fail-over memory
02/20/2003US20030037277 Semiconductor device
02/20/2003US20030036231 System and method to screen defect related reliability failures in CMOS SRAMS
02/20/2003US20030036226 Semiconductor memory with jointly usable fuses
02/20/2003US20030035400 Circuit for testing an integrated circuit
02/20/2003US20030035333 Integrated circuit capable of being burn-in tested using an alternating current stress and a testing method using the same
02/20/2003US20030035330 Cancellation of redundant elements with a cancel bank
02/20/2003US20030035328 Semiconductor memory device shiftable to test mode in module as well as semiconductor memory module using the same
02/20/2003US20030035322 Flash memory array partitioning architectures
02/20/2003US20030035319 Multiple bit line column redundancy
02/20/2003US20030034784 Method for determining the transit time of electrical signals on printed circuit boards using automatic standard test equipment
1 ... 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 ... 306