Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
05/2003
05/15/2003US20030090938 Nonvolatile semiconductor memory device and method of retrieving faulty in the same
05/15/2003US20030090301 Semiconductor circuit and semiconductor device
05/15/2003US20030090295 Self test method and device for dynamic voltage screen functionality improvement
05/15/2003US20030090285 System for testing integrated circuit devices
05/15/2003US20030090274 Laser-trimming fuse detecting circuit and method for semiconductor integrated circuit
05/15/2003US20030089936 Structure and method for embedding capacitors in Z-connected multi-chip modules
05/15/2003CA2465843A1 Dual mode high voltage power supply for providing increased speed in programming during testing of low voltage non-volatile memories
05/14/2003EP1309877A2 Method to descramble the data mapping in memory circuits
05/14/2003EP0868693B1 Circuit and method for enabling a function in a multiple memory device module
05/13/2003US6564351 Circuit and method for testing an integrated circuit
05/13/2003US6564346 Advanced bit fail map compression with fail signature analysis
05/13/2003US6564345 Method for creating defect management information in an recording medium, and apparatus and medium based on said method
05/13/2003US6564344 System and method of generating dynamic word line from the content addressable memory (CAM) “hit/miss” signal which is scannable for testability
05/13/2003US6564303 Dual port memory for digital signal processor
05/13/2003US6564287 Semiconductor memory device having a fixed CAS latency and/or burst length
05/13/2003US6564281 Synchronous memory device having automatic precharge
05/13/2003US6563760 Circuit and method for generating internal command signals in a semiconductor memory device
05/13/2003US6563759 Semiconductor memory device
05/13/2003US6563752 Qualification test method and circuit for a non-volatile memory
05/13/2003US6563751 System and method for testing TDM sRAMs
05/13/2003US6563750 Semiconductor memory including a circuit for selecting redundant memory cells
05/13/2003US6563749 Dynamic memory circuit including spare cells
05/13/2003US6563740 Electronic circuit and method for testing and refreshing non-volatile memory
05/13/2003US6563738 Nonvolatile semiconductor memory device having electrically and collectively erasable characteristics
05/13/2003US6563732 Redundancy circuit and method for flash memory devices
05/13/2003US6563729 Configuration for evaluating a signal which is read from a ferroelectric storage capacitor
05/13/2003US6563070 Enhanced grading and sorting of semiconductor devices using modular “plug-in” sort algorithms
05/08/2003WO2003038916A1 Information recording method using superconduction having bands, calculating method, information transmitting method, energy storing method, magnetic flux measuring method, and quantum bit constructing method
05/08/2003WO2003038834A1 Column redundancy for content addressable memory
05/08/2003WO2003038628A1 Apparatus and method for a distributed raid
05/08/2003WO2002095756A3 Dynamic memory and method for testing a dynamic memory
05/08/2003US20030088816 Method and system for detecting and isolating faulted part of a memory device
05/08/2003US20030088815 Using data compression for faster testing of embedded memory
05/08/2003US20030088806 Restarting a coupling facility command using a token from another coupling facility command
05/08/2003US20030088785 ID installable LSI, secret key installation method, LSI test method, and LSI development method
05/08/2003US20030086376 High-speed digital multiplexer
05/08/2003US20030086326 Non-volatile flash fuse element
05/08/2003US20030086323 Serial access memory and data write/read method
05/08/2003US20030086320 Semiconductor device having integrated memory and logic
05/08/2003US20030086310 Shared redundancy for memory having column addressing
05/08/2003US20030086306 Semiconductor memory device equipped with error correction circuit
05/08/2003US20030086304 Semiconductor memory device
05/08/2003US20030086292 Nonvolatile semiconductor storage device and test method therefor
05/08/2003US20030085731 Semiconductor device having test mode entry circuit
05/08/2003US20030085729 Methods and apparatus for testing electronic circuits
05/08/2003US20030085727 Test structure and method for determining a minimum tunnel opening size in a non-volatile memory cell
05/08/2003US20030085725 Integrated circuit having a test circuit, and method of decoupling a test circuit in an integrated circuit
05/08/2003US20030085445 Semiconductor devices
05/08/2003DE19536226C2 Testbare Schaltungsanordnung mit mehreren identischen Schaltungsblöcken Testable circuit with several identical circuit blocks
05/08/2003DE10154614C1 Integrierte Schaltung mit einer Testschaltung und Verfahren zum Entkoppeln einer Testschaltung An integrated circuit comprising a test circuit and method for isolating a test circuit
05/07/2003EP1308965A2 Test array
05/07/2003EP1307912A2 Automated determination and display of the physical location of a failed cell in an array of memory cells
05/07/2003EP1222664B1 Method for identifying an integrated circuit
05/07/2003EP0931315B1 Trimming circuit
05/07/2003EP0792270B1 Use of 2,7,8-trimethyl-2-(beta-carboxyethyl)-6-hydroxy chroman (LLU-alpha)
05/07/2003EP0728367B1 A flash eprom transistor array and method for manufacturing the same
05/07/2003CN1416574A Semiconductor memory
05/07/2003CN1416546A Digital memory circuit
05/07/2003CN1416139A Nonvolatile semiconductor memory having backup memory block
05/07/2003CN1416133A 半导体存储器 Semiconductor memory
05/07/2003CN1107958C Synchronous semiconductor storage device having circuit capable of reliably resetting detection means
05/06/2003US6560740 Apparatus and method for programmable built-in self-test and self-repair of embedded memory
05/06/2003US6560732 Operating method for an integrated memory having writeable memory cells and corresponding integrated memory
05/06/2003US6560731 Method for checking the functioning of memory cells of an integrated semiconductor memory
05/06/2003US6560730 Method and apparatus for testing a non-volatile memory array having a low number of output pins
05/06/2003US6560729 Automated determination and display of the physical location of a failed cell in an array of memory cells
05/06/2003US6560728 Layout for semiconductor memory device having a plurality of rows and columns of circuit cells divided into first and second planes that are not simultaneously active
05/06/2003US6560725 Method for apparatus for tracking errors in a memory system
05/06/2003US6560617 Operation of a standby server to preserve data stored by a network server
05/06/2003US6560163 Semiconductor device including a repetitive pattern
05/06/2003US6560150 Memory device testing
05/06/2003US6560149 Integrated semiconductor memory device
05/06/2003US6560148 Semiconductor memory having mirroring function
05/06/2003US6560147 Semiconductor device having scan test circuit that switches clock signal between shift mode and capture mode, and method of testing the semiconductor device
05/06/2003US6560141 Semiconductor integrated circuit with memory redundancy circuit
05/06/2003US6559669 Synchronous semiconductor device, and inspection system and method for the same
05/02/2003EP1305647A2 Method and apparatus for testing high performance circuits
05/02/2003EP0547640B1 Non-volatile semiconductor memory device and memory system using the same
05/01/2003WO2002089147A3 Circuit and method for memory test and repair
05/01/2003WO2002071410A3 Higher program threshold voltage and faster programming rates based on improved erase methods
05/01/2003WO2002029824A3 System and method for testing integrated circuit devices
05/01/2003US20030084397 Apparatus and method for a distributed raid
05/01/2003US20030084389 Method and apparatus for flexible memory for defect tolerance
05/01/2003US20030084387 Pseudo fail bit map generation for RAMS during component test and burn-in in a manufacturing environment
05/01/2003US20030084386 ECC Based system and method for repairing failed memory elements
05/01/2003US20030084231 Nonvolatile semiconductor storage device with interface functions
05/01/2003US20030081490 Semiconductor memory device allowing high density structure or high performance
05/01/2003US20030081484 Semiconductor device having temperature detecting function, testing method, and refresh control method of semiconductor storage device having temperature detecting function
05/01/2003US20030081480 Semiconductor memory device and its data writing method
05/01/2003US20030081479 Semiconductor memory device
05/01/2003US20030081478 Nonvolatile semiconductor memory device with backup memory block
05/01/2003US20030081477 Test array and method for testing memory arrays
05/01/2003US20030081475 Circuit configuration fir evaluating the information content of a memory cell
05/01/2003US20030081471 Semiconductor device with flexible redundancy system
05/01/2003US20030081466 Binary counter
05/01/2003US20030081464 Column redundancy for content addressable memory
05/01/2003US20030081459 Fail number detecting circuit of flash memory
05/01/2003US20030080812 Circuit configuration for detecting a functional disturbance
05/01/2003US20030080762 Method and apparatus for testing a non-standard memory device under actual operating conditions
05/01/2003US20030080336 Circuit for an electronic semiconductor module
1 ... 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 ... 306