| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 05/01/2003 | US20030080335 Semiconductor device, and verification method for semiconductor testing apparatus and method using the semiconductor device |
| 05/01/2003 | US20030080278 Testing circuit for charge detection circuit, LSI, image sensor, and testing method for the charge detection circuit |
| 04/30/2003 | DE10130785C2 Speicherbaustein und Vorrichtung zum Testen eines Speicherbausteins Memory device and apparatus for testing a memory device |
| 04/30/2003 | CN1414619A Testing array and method for testing storage array |
| 04/30/2003 | CN1414564A Semiconductor memory capable of implemention high density or high performance |
| 04/30/2003 | CN1107320C Semiconductor storage device and electronic equipment using the same |
| 04/29/2003 | US6557140 Disk array system and its control method |
| 04/29/2003 | US6557130 Configuration and method for storing the test results obtained by a BIST circuit |
| 04/29/2003 | US6557127 Method and apparatus for testing multi-port memories |
| 04/29/2003 | US6557114 Loosely coupled mass storage computer cluster |
| 04/29/2003 | US6556493 Method for testing memory cell in semiconductor device |
| 04/29/2003 | US6556492 System for testing fast synchronous semiconductor circuits |
| 04/29/2003 | US6556491 Semiconductor storage device and method of testing the same |
| 04/29/2003 | US6556490 System and method for redundancy implementation in a semiconductor device |
| 04/29/2003 | US6556485 Output buffer capable of adjusting current drivability and semiconductor integrated circuit device having the same |
| 04/29/2003 | US6556479 Nonvolatile semiconductor memory device |
| 04/29/2003 | US6556467 Gate voltage testkey for isolation transistor |
| 04/29/2003 | US6556065 256 Meg dynamic random access memory |
| 04/24/2003 | WO2003034440A2 Configurable asic memory bist controller employing multiple state machines |
| 04/24/2003 | WO2003034439A2 Memory bist employing a memory bist signature |
| 04/24/2003 | WO2003034436A2 Semiconductor storage unit provided with intersecting word and bit lines whereon are arranged magnetoresistive memory cells |
| 04/24/2003 | WO2003034082A1 Application specific event based semiconductor memory test system |
| 04/24/2003 | WO2003033404A1 Silicon plate, method for producing silicon plate, and solar cell |
| 04/24/2003 | WO2003023358A3 Methods and apparatus for testing electronic circuits |
| 04/24/2003 | WO2001082053A3 A low latency fifo circuit for mixed clock systems |
| 04/24/2003 | US20030079164 Method and configuration for the output of bit error tables from semiconductor devices |
| 04/24/2003 | US20030076728 Semiconductor device having test mode |
| 04/24/2003 | US20030076724 Semiconductor memory device and test method therof |
| 04/24/2003 | US20030076723 Automatic generation and validation of memory test models |
| 04/24/2003 | US20030076716 Data memory |
| 04/24/2003 | US20030076715 Semiconductor memory device |
| 04/24/2003 | US20030076714 Semiconductor integrated circuit, and a data storing method thereof |
| 04/24/2003 | US20030076702 Semiconductor memory device having first and second memory architecture and memory system using the same |
| 04/24/2003 | US20030076127 Method for testing a plurality of devices |
| 04/24/2003 | US20030076125 Method and system for wafer and device level testing of an integrated circuit |
| 04/24/2003 | US20030075775 Circuit having make-link type fuse and semiconductor device having the same |
| 04/24/2003 | US20030075716 Semiconductor device with high speed switching of test modes |
| 04/23/2003 | EP1303815A2 System initialization of microcode-based memory built-in self-test |
| 04/23/2003 | EP1208568B1 A memory module test system with reduced driver output impedance |
| 04/23/2003 | EP0763794B1 Semiconductor memory and method for substituting a redundancy memory cell |
| 04/23/2003 | EP0639811B1 Memory systems with data storage redundancy management |
| 04/23/2003 | CN1412829A Semiconductor testing device, testing and mfg. method for semiconductor device |
| 04/23/2003 | CN1412570A CGROM detection device and method |
| 04/23/2003 | CN1106648C Semiconductor integrated circuit having test circuit |
| 04/22/2003 | US6553528 Test circuit for semiconductor integrated circuit |
| 04/22/2003 | US6553527 Programmable array built-in self test method and controller with programmable expect generator |
| 04/22/2003 | US6553526 Programmable array built-in self test method and system for arrays with imbedded logic |
| 04/22/2003 | US6553521 Method for efficient analysis semiconductor failures |
| 04/22/2003 | US6553520 Integrated circuit devices with mode-selective external signal routing capabilities and methods of operation therefor |
| 04/22/2003 | US6553517 Interleavers and de-interleavers |
| 04/22/2003 | US6553510 Memory device including redundancy routine for correcting random errors |
| 04/22/2003 | US6553453 Variable width content addressable memory device for searching variable width data |
| 04/22/2003 | US6552960 Semiconductor integrated circuit device |
| 04/22/2003 | US6552954 Semiconductor integrated circuit device |
| 04/22/2003 | US6552946 Address generating circuit |
| 04/22/2003 | US6552941 Method and apparatus for identifying SRAM cells having weak pull-up PFETs |
| 04/22/2003 | US6552940 Sacrifice read test mode |
| 04/22/2003 | US6552939 Semiconductor memory device having disturb test circuit |
| 04/22/2003 | US6552938 Column redundancy system and method for embedded DRAM devices with multibanking capability |
| 04/22/2003 | US6552937 Memory device having programmable column segmentation to increase flexibility in bit repair |
| 04/22/2003 | US6552936 Semiconductor storage apparatus |
| 04/22/2003 | US6552920 Saving content addressable memory power through conditional comparisons |
| 04/22/2003 | US6552587 Synchronous semiconductor device for adjusting phase offset in a delay locked loop |
| 04/22/2003 | US6552575 Word line testability improvement |
| 04/22/2003 | US6552554 Directly and quickly testing wafers without patterning |
| 04/22/2003 | US6551846 Semiconductor memory device capable of correctly and surely effecting voltage stress acceleration |
| 04/17/2003 | WO2003032372A1 A three-dimensional memory |
| 04/17/2003 | WO2002080183A3 Memory cell structural test |
| 04/17/2003 | WO2002054411A3 Method for reading semiconductor die information in a parallel test and burn-in system |
| 04/17/2003 | WO2002039460A3 Full-speed bist controller for testing embedded synchronous memories |
| 04/17/2003 | US20030074623 Algorithmic test pattern generator |
| 04/17/2003 | US20030074621 ASIC logic BIST employing registers seeded with differing primitive polynomials |
| 04/17/2003 | US20030074620 Configurable asic memory bist controller employing multiple state machines |
| 04/17/2003 | US20030074619 Memory bist employing a memory bist signature |
| 04/17/2003 | US20030074618 Dual mode ASIC BIST controller |
| 04/17/2003 | US20030074617 ASIC BIST employing stored indications of completion |
| 04/17/2003 | US20030074616 ASIC BIST controller employing multiple clock domains |
| 04/17/2003 | US20030074613 Apparatus for testing semiconductor device |
| 04/17/2003 | US20030074612 Structure and method of repairing SDRAM by generating slicing table of fault distribution |
| 04/17/2003 | US20030074611 Efficient test structure for non-volatile memory and other semiconductor integrated circuits |
| 04/17/2003 | US20030074610 Method for improving utilization of a defective memory device in an image processing system |
| 04/17/2003 | US20030074153 Application specific event based semiconductor memory test system |
| 04/17/2003 | US20030074152 System and method of testing non-volatile memory cells |
| 04/17/2003 | US20030072204 Semiconductor device |
| 04/17/2003 | US20030072202 Semiconductor device, data processing system and a method for changing threshold of a non-volatile memory cell |
| 04/17/2003 | US20030072197 Semiconductor memory device which can recover a memory fail |
| 04/17/2003 | US20030072190 Semiconductor memory device having disturb test circuit |
| 04/17/2003 | US20030072187 Semiconductor storage device conducting a late-write operation and controlling a test read-operation to read data not from a data latch circuit but from a memory core circuit regardless of whether a preceding address and a present address match each other |
| 04/17/2003 | US20030071649 Method for testing semiconductor circuit devices |
| 04/16/2003 | EP1302777A2 Dual mode ASIC BIST Controller |
| 04/16/2003 | EP1019821B1 Method and apparatus for correcting a multilevel cell memory by using interleaving |
| 04/16/2003 | CN1411071A Semiconductor storage and measuring method thereof |
| 04/16/2003 | CN1411063A 半导体集成电路 The semiconductor integrated circuit |
| 04/16/2003 | CN1106018C Dimension programmable fusebanks and method for making same |
| 04/15/2003 | US6550034 Built-in self test for content addressable memory |
| 04/15/2003 | US6550033 Method and apparatus for exercising external memory with a memory built-in test |
| 04/15/2003 | US6550032 Detecting interport faults in multiport static memories |
| 04/15/2003 | US6550028 Array VT mode implementation for a simultaneous operation flash memory device |
| 04/15/2003 | US6550027 Method and article of manufacture for differentiating between a non-volatile memory device and an emulator for purposes of in-circuit programming |
| 04/15/2003 | US6550026 High speed test system for a memory device |