| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 04/15/2003 | US6550023 On-the-fly memory testing and automatic generation of bitmaps |
| 04/15/2003 | US6549480 Semiconductor integrated circuit allowing internal voltage to be measured and controlled externally |
| 04/15/2003 | US6549478 Scan register circuit for scanning data for determining failure in a semiconductor device |
| 04/15/2003 | US6549459 Method of managing a defect in a flash memory |
| 04/15/2003 | US6549445 Semiconductor memory device including plurality of global data lines in parallel arrangement with low parasitic capacitance, and fabrication method thereof |
| 04/15/2003 | US6548884 Semiconductor device |
| 04/10/2003 | WO2003030181A1 Data writing apparatus, data writing method, and program |
| 04/10/2003 | WO2003001529A3 Method and circuit arrangement for memory redundancy system |
| 04/10/2003 | US20030070133 Familial correction with non-familial double bit error detection |
| 04/10/2003 | US20030070126 Built-in self-testing of multilevel signal interfaces |
| 04/10/2003 | US20030070121 Semiconductor test apparatus and method |
| 04/10/2003 | US20030069726 Method for classifying components |
| 04/10/2003 | US20030067825 Semiconductor memory device |
| 04/10/2003 | US20030067822 Semiconductor device with improved latch arrangement |
| 04/10/2003 | US20030067816 Column redundancy system and method for embedded dram devices with multibanking capability |
| 04/10/2003 | US20030067815 Semiconductor integrated circuit device allowing accurate evaluation of access time of memory core contained therein and access time evaluating method |
| 04/10/2003 | US20030067318 Semiconductor integrated circuit |
| 04/10/2003 | US20030067043 Three-dimensional memory |
| 04/10/2003 | US20030067016 Semiconductor device and method for testing semiconductor device |
| 04/10/2003 | US20030067002 Wafer with additional circuit parts in the kerf area for testing integrated circuits on the wafer |
| 04/09/2003 | EP1300855A2 Semiconductor memory device suitable for merging with logic |
| 04/09/2003 | CN1409492A Error-correcting code circuit |
| 04/09/2003 | CN1409384A Synchronous test method and circuit of interal memory segments |
| 04/09/2003 | CN1409323A Method and device for detecting information of memory |
| 04/08/2003 | US6546519 Optical disc recording/reproducing method, optical disc and optical disc device |
| 04/08/2003 | US6546511 Apparatus and method for parallel testing of multiple functional blocks of an integrated circuit |
| 04/08/2003 | US6546510 Burn-in mode detect circuit for semiconductor device |
| 04/08/2003 | US6546503 Synchronous semiconductor memory device capable of reducing test cost and method of testing the same |
| 04/08/2003 | US6546446 Synchronous memory device having automatic precharge |
| 04/08/2003 | US6545931 Semiconductor memory device with improved flexible redundancy scheme |
| 04/08/2003 | US6545927 Integrated semiconductor circuit, in particular a semiconductor memory configuration, and method for its operation |
| 04/08/2003 | US6545926 Antifuse address detecting circuit programmable by applying a high voltage and semiconductor integrated circuit device provided with the same |
| 04/08/2003 | US6545925 Semiconductor device with self refresh test mode |
| 04/08/2003 | US6545921 Semiconductor memory device allowing spare memory cell to be tested efficiently |
| 04/08/2003 | US6545920 Defective address storage scheme for memory device |
| 04/08/2003 | US6545912 Erase verify mode to evaluate negative Vt's |
| 04/08/2003 | US6545910 Non-volatile semiconductor memory device having word line defect check circuit |
| 04/08/2003 | US6545897 Dynamic RAM-and semiconductor device |
| 04/08/2003 | CA2245549C Assembly and method for testing integrated circuit devices |
| 04/03/2003 | WO2002080184A3 On-chip circuits for high speed memory testing with a slow memory tester |
| 04/03/2003 | WO2002073658A3 Yield and speed enhancement of semiconductor integrated circuits using post-fabrication transistor mismatch compensation circuitry |
| 04/03/2003 | US20030066040 Built off self test (BOST) in the kerf |
| 04/03/2003 | US20030065999 Self-test ram using external synchronous clock |
| 04/03/2003 | US20030065998 Test method and test device for electronic memories |
| 04/03/2003 | US20030065997 Semiconductor device |
| 04/03/2003 | US20030065996 Test circuit for semiconductor memory and semiconductor memory device |
| 04/03/2003 | US20030065994 Semiconductor device with malfunction control circuit and controlling method thereof |
| 04/03/2003 | US20030065973 Memory and method for employing a checksum for addresses of replaced storage elements |
| 04/03/2003 | US20030065465 Method and apparatus providing improved data path calibration for memory devices |
| 04/03/2003 | US20030063518 Programming methods and circuits for semiconductor memory cell and memory array using a breakdown phenomena in an ultra-thin dielectric |
| 04/03/2003 | US20030063510 Memory employing multiple enable/disable modes for redundant elements and testing method using same |
| 04/03/2003 | US20030063509 Semiconductor memory device capable of imposing large stress on transistor |
| 04/03/2003 | US20030063500 Flash memory sector tagging for consecutive sector erase or bank erase |
| 04/03/2003 | US20030063497 256 meg dynamic random access memory |
| 04/03/2003 | US20030063495 Semiconductor integrated circuit having latching means capable of scanning |
| 04/03/2003 | US20030063488 Ferroelectric memory and a test method thereof |
| 04/02/2003 | EP1298668A2 Semiconductor memory device including clock-independent sense amplifier |
| 04/02/2003 | EP1212628B1 Variable length pattern generator for chip tester system |
| 04/02/2003 | EP1141736B1 Pattern generator for a packet-based memory tester |
| 04/02/2003 | CN1407560A Semiconductor device equiped with memory and logical chips for testing memory ships |
| 04/02/2003 | CN1104728C Memory circuit and data control circuit of memory circuit and address assigning circuit of memory circuit |
| 04/01/2003 | US6543027 On-chip detection of clock gitches by examination of consecutive data |
| 04/01/2003 | US6543019 Method for built-in self test of an electronic circuit |
| 04/01/2003 | US6543017 Semiconductor storage device |
| 04/01/2003 | US6543016 Testing content-addressable memories |
| 04/01/2003 | US6543015 Efficient data compression circuit for memory testing |
| 04/01/2003 | US6542973 Integrated redundancy architecture system for an embedded DRAM |
| 04/01/2003 | US6542431 Semiconductor memory device and method for selecting multiple word lines in a semiconductor memory device |
| 04/01/2003 | US6542428 Semiconductor memory device allowing increase in capacity and operation speed with a suppressed layout area |
| 04/01/2003 | US6542422 Semiconductor memory device performing high speed coincidence comparison operation with defective memory cell address |
| 04/01/2003 | US6542421 Semiconductor memory device with redundancy circuit |
| 04/01/2003 | US6542420 Semiconductor device with flexible redundancy system |
| 04/01/2003 | US6542419 Semiconductor integrated circuit device with electrically programmable fuse |
| 04/01/2003 | US6542418 Redundant memory array having dual-use repair elements |
| 04/01/2003 | US6542407 Techniques of recovering data from memory cells affected by field coupling with adjacent memory cells |
| 04/01/2003 | US6542405 Semiconductor memory device having faulty cells |
| 04/01/2003 | US6541983 Method for measuring fuse resistance in a fuse array |
| 04/01/2003 | US6541791 Method and system for semiconductor die testing |
| 03/27/2003 | WO2003025944A1 Semiconductor memory cell and memory array using a breakdown phenomena in an ultra-thin dielectric |
| 03/27/2003 | WO2003025600A1 Multilevel signal interface testing with binary test apparatus by emulation of multilevel signals |
| 03/27/2003 | WO2003025599A1 Built-in self-testing of multilevel signal interfaces |
| 03/27/2003 | WO2002103522A3 System and method for built in self repair of memories using speed stress test |
| 03/27/2003 | WO2002101749A8 Methods and apparatus for analyzing and repairing memory |
| 03/27/2003 | WO2002037130A3 Method for testing integrated circuits |
| 03/27/2003 | US20030061554 Memory chip and apparatus for testing a memory chip |
| 03/27/2003 | US20030061545 Method and apparatus for providing test mode access to an instruction cache and microcode rom |
| 03/27/2003 | US20030061536 Power controlling method for semiconductor storage device and semiconductor storage device employing same |
| 03/27/2003 | US20030061532 Method for replacing defective memory cells in data processing apparatus |
| 03/27/2003 | US20030061447 Memory system including a point-to-point linked memory subsystem |
| 03/27/2003 | US20030059962 Method for testing semiconductor chips |
| 03/27/2003 | US20030058730 Semiconductor memory device and its testing method |
| 03/27/2003 | US20030058719 Semiconductor memory device including clock-independent sense amplifier |
| 03/27/2003 | US20030058717 Word-line deficiency detection method for semiconductor memory device |
| 03/27/2003 | US20030058716 Semiconductor memory device having redundancy structure with defect relieving function |
| 03/27/2003 | US20030058715 Nonvolatile semiconductor memory device and method for testing the same |
| 03/27/2003 | US20030058714 Modular memory structure having adaptable redundancy circuitry |
| 03/27/2003 | US20030058711 Method for integrating imperfect semiconductor memory devices in data processing apparatus |
| 03/27/2003 | US20030058028 Unit-architecture with implemented limited bank-column-select repairability |
| 03/27/2003 | US20030058020 Semiconductor device capable of reducing noise to signal line |
| 03/27/2003 | US20030057513 Membrane IC fabrication |