Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
08/2003
08/19/2003US6608498 Method for characterizing an active track and latch sense-amp (comparator) in a one time programmable (OTP) salicided poly fuse array
08/14/2003WO2003034436A3 Semiconductor storage unit provided with intersecting word and bit lines whereon are arranged magnetoresistive memory cells
08/14/2003WO2003021604A3 Method and device for testing semiconductor memory devices
08/14/2003US20030154437 Error control coding method and system for non-volatile memory
08/14/2003US20030154434 Self testing-and-repairing data buffer and method for operating the same
08/14/2003US20030154426 Method and apparatus for programmable BIST and an optional error counter
08/14/2003US20030154422 Method for repairing a semiconductor memory
08/14/2003US20030151962 Semiconductor integrated circuit device
08/14/2003US20030151961 Semiconductor memory device having internal circuit screening function
08/14/2003US20030151955 Semiconductor memory device including page latch circuit
08/14/2003US20030151437 Method and circuit for accelerating redundant address matching
08/14/2003US20030151421 Method and apparatus for probing, testing, burn-in, repairing and programming of integrated circuits in a closed environment using a single apparatus
08/14/2003US20030151134 Semiconductor device
08/13/2003EP1168179B1 Dynamic memory with spare cells
08/13/2003EP0766176B1 Replacement semiconductor read-only memory
08/13/2003CN1435890A Semiconductor storage apparatus
08/13/2003CN1435846A Semiconductor memory device and electronic information apparatus using same
08/13/2003CN1435843A Synchronous semiconductor memory apparatus with plurality of memory sets and method for controlling same
08/13/2003CN1118100C Monobrid semiconductor IC device and checking method thereof
08/13/2003CN1118072C 半导体装置 Semiconductor device
08/13/2003CN1118071C Test method of high speed memory devices in whick limit conditions for clock signals are difined
08/12/2003US6606274 Semiconductor memory device having function of supplying stable power supply voltage
08/12/2003US6606273 Methods and systems for flash memory tunnel oxide reliability testing
08/12/2003US6606270 Device and method for supplying current to a semiconductor memory to support a boosted voltage within the memory during testing
08/12/2003US6606262 Magnetoresistive random access memory (MRAM) with on-chip automatic determination of optimized write current method and apparatus
08/12/2003US6606261 Method for performing write and read operations in a passive matrix memory, and apparatus for performing the method
08/12/2003US6605956 Device and method for testing integrated circuit dice in an integrated circuit module
08/07/2003WO2003065210A1 Information processing apparatus, memory management apparatus, memory management method, and information processing method
08/07/2003US20030149922 Embedded testing capability for integrated serializer/deserializers
08/07/2003US20030149915 Testability analysis system and method, and design for testability system and method
08/07/2003US20030147296 Semiconductor memory unit
08/07/2003US20030147294 Method of screening non-volatile memory devices
08/07/2003US20030147293 Autotesting method of a memory cell matrix, particularly of the non-volatile type
08/07/2003US20030147292 Memory device having programmable column segmentation to increase flexibility in bit repair
08/07/2003US20030147291 Failed cell address programming circuit and method for programming failed cell address
08/07/2003US20030147285 Memory cell configuration
08/07/2003US20030147276 Semiconductor storage device
08/07/2003US20030146454 Semiconductor integrated circuit and method of manufacturing of semiconductor integrated circuit
08/06/2003EP1333447A2 Semiconductor memory device and electronic information device using the same
08/06/2003EP1333446A2 Circuit and method for testing a ferroelectric memory device
08/06/2003EP1333445A2 Method for operating a memory device
08/06/2003EP1332502A2 Method for testing integrated circuits
08/06/2003EP1332501A2 Memory management logic for expanding the utilization of read-only memories
08/06/2003EP1332500A2 Writable tracking cells
08/06/2003EP1242998B1 Method and apparatus for exercising external memory with a memory built-in self-test
08/06/2003EP1190324B1 Process for the secure writing of a pointer for a circular memory
08/06/2003EP1131718A4 Levelizing transfer delays for a channel of memory devices in a memory subsystem
08/06/2003EP1129415A4 Automatic generation of user definable memory bist circuitry
08/06/2003CN1434458A Method and device for dynamically hiding memory defect
08/06/2003CN1434302A IC tester using optical driving type driver and optical output voltage sensor
08/06/2003CN1117321C Improved redundant circuits anjd method therefor
08/05/2003US6604213 Method and apparatus for determining a minimum clock delay in a memory
08/05/2003US6604058 Semiconductor device testing apparatus and method for testing semiconductor device
08/05/2003US6603691 Semiconductor device including built-in redundancy analysis circuit for simultaneously testing and analyzing failure of a plurality of memories and method for analyzing the failure of the plurality of memories
08/05/2003US6603690 Low-power static column redundancy scheme for semiconductor memories
08/05/2003US6603689 Semiconductor memory device having redundancy system
08/05/2003US6603688 Semiconductor memory device having improved arrangement for replacing failed bit lines
08/05/2003US6603679 Coupling coefficient measuring method and coupling coefficient measuring apparatus for semiconductor memory
08/05/2003US6603331 Low-voltage non-degenerative transmitter circuit
08/05/2003US6603328 Semiconductor integrated circuit
07/2003
07/31/2003WO2003063250A1 Programmable memory address and decode circuits with ultra thin vertical body transistors
07/31/2003WO2003063176A1 Method and apparatus for dynamic degradation detection
07/31/2003WO2003063170A1 Circuit for deactivating faulty functional components
07/31/2003WO2003046925A3 Built-in self-testing for double data rate input/output interface
07/31/2003US20030145303 Method for activating fuse units in electronic circuit device
07/31/2003US20030145262 Testing method for permanent electrical removal of an integrated circuit output after packaging
07/31/2003US20030145261 Test-facilitating circuit using built-in self test circuit
07/31/2003US20030145260 Variable self-time scheme for write recovery by low speed tester
07/31/2003US20030145250 Dynamic built-in self-skip method used for shared memory fault recovery
07/31/2003US20030145241 Method and apparatus for reducing leakage power in a cache memory using adaptive time-based decay
07/31/2003US20030145176 Mass storage device architecture and operation
07/31/2003US20030145160 Nonvolatile memory, its data updating method, and card reader equipped with such nonvolatile memory
07/31/2003US20030145158 Embedded DRAM system having wide data bandwidth and data transfer data protocol
07/31/2003US20030142577 Synchronous semiconductor memory device with a plurality of memory banks and method of controlling the same
07/31/2003US20030142571 Semiconductor device, nonvolatile semiconductor memory, system including a plurality of semiconductor devices or nonvolatile semiconductor memories, electric card including semiconductor device or nonvolatile semiconductor memory, and electric device with which this electric card can be used
07/31/2003US20030142566 Semiconductor memory device capable of performing high-frequency wafer test operation
07/31/2003US20030142565 Circuit and method for testing a ferroelectric memory device
07/31/2003US20030142563 Semiconductor memory device and electronic information device using the same
07/31/2003US20030142559 256 Meg dynamic random access memory
07/31/2003US20030142545 Non-volatile semiconductor memory device
07/31/2003US20030141922 256 Meg dynamic random access memory
07/31/2003US20030141896 Method and apparatus for low capacitance, high output impedance driver
07/31/2003US20030141588 Semiconductor device
07/30/2003EP1331642A1 Semiconductor storage device, its testing method, and test circuit
07/30/2003EP0992998B1 Nonvolatile memory device and inspection method thereof
07/30/2003CN1433024A Reluctance RAM method and device with automatically determined optimized write current
07/30/2003CN1433023A Magnetic film memory device with redundant repair function
07/30/2003CN1116613C Method and apparatus for probing, testing, burning, repairing and programming of integrated circuits in closed environment using single apparatus
07/29/2003US6601218 Semiconductor integrated circuit device
07/29/2003US6601212 Method and apparatus for downloading firmware to a non-volatile memory
07/29/2003US6601205 Method to descramble the data mapping in memory circuits
07/29/2003US6601204 Pattern generating method, pattern generator using the method, and memory tester using the pattern generator
07/29/2003US6601201 Method and apparatus for displaying test results and recording medium
07/29/2003US6601199 Memory-embedded LSI
07/29/2003US6601197 Semiconductor memory device
07/29/2003US6601194 Circuit configuration for repairing a semiconductor memory
07/29/2003US6601191 Apparatus and method for detecting over-programming condition in multistate memory device
07/29/2003US6601132 Nonvolatile memory and method of writing data thereto
07/29/2003US6600687 Method of compensating for a defect within a semiconductor device
07/29/2003US6600685 Semiconductor memory device having test mode
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