Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
11/2003
11/13/2003US20030212933 Systems and methods for testing a memory
11/13/2003US20030212931 System, Method, and computer program product within a data processing system for converting a spare storage device to a defined storage device in a logical volume
11/13/2003US20030212925 Memory circuit testing system, semiconductor device, and memory testing method
11/13/2003US20030212517 Method for testing an electronic component; computer program product, computer readable medium, and computer embodying the method; and method for downloading the program embodying the method
11/13/2003US20030210599 Integrated volatile and non-volatile memory
11/13/2003US20030210596 Magnetoresistive random access memory (MRAM) with on-chip automatic determination of optimized write current method and apparatus
11/13/2003US20030210595 Semiconductor device with self refresh test mode
11/13/2003US20030210594 Semiconductor memory device having multi-bit testing function
11/13/2003US20030210593 Programmable weak write test mode
11/13/2003US20030210589 Wafer burn-in test and wafer test circuit
11/13/2003US20030210587 Storage device employing a flash memory
11/13/2003US20030210577 Semiconductor memory device
11/13/2003US20030210566 Semiconductor memory device
11/13/2003US20030209790 Semiconductor memory module
11/13/2003DE10226584C1 Memory circuit testing device has failed addresses received from memory circuit interface stored in different memory cells dependent on their data rate
11/13/2003DE10219782C1 Verfahren und Hilfseinrichtung zum Testen einer RAM-Speicherschaltung Method and auxiliary device for testing a RAM memory circuit
11/12/2003EP1361450A1 Method for testing an electronic component
11/12/2003EP1360693A1 Programmable fuse and antifuse and method therefor
11/12/2003CN1455932A Semiconductor storage device, its testing method, and test circuit
11/12/2003CN1455413A Differencial current estimation circuit of estimating memory state of static random memory semiconductor memory cell unit and reading amplifying circuit
11/11/2003US6647524 Built-in-self-test circuit for RAMBUS direct RDRAM
11/11/2003US6647522 Semiconductor devices having multiple memories
11/11/2003US6647521 Memory testing method and apparatus, and computer-readable recording medium
11/11/2003US6647520 Semiconductor device
11/11/2003US6646954 Synchronous controlled, self-timed local SRAM block
11/11/2003US6646952 Semiconductor circuit and semiconductor device
11/11/2003US6646944 Semiconductor memory device
11/11/2003US6646937 Integrated clock generator, particularly for driving a semiconductor memory with a test signal
11/11/2003US6646936 Semiconductor memory device shiftable to test mode in module as well as semiconductor memory module using the same
11/11/2003US6646935 Semiconductor memory device for reducing number of input cycles for inputting test pattern
11/11/2003US6646934 Semiconductor device
11/11/2003US6646933 Method and apparatus to reduce the amount of redundant memory column and fuses associated with a memory device
11/11/2003US6646932 Semiconductor memory device having redundancy system
11/11/2003US6646931 Life warning generation system and method of semiconductor storage device equipped with flash memory
11/11/2003US6646930 Non-volatile semiconductor memory
11/11/2003US6646920 Nonvolatile semiconductor memory device having electrically and collectively erasable characteristics
11/11/2003US6646919 Apparatus and method for margin testing single polysilicon EEPROM cells
11/11/2003US6646915 Semiconductor device
11/11/2003US6646905 Ferroelectric storage device
11/11/2003US6646503 Circuit configuration for detecting a functional disturbance
11/11/2003US6646461 Method and apparatus for testing semiconductor devices using improved testing sequence
11/06/2003WO2003092015A1 Redundancy in chained memory architectures
11/06/2003WO2003092012A2 Flexible redundancy for memories
11/06/2003WO2003001380A3 Method and apparatus for preservation of failure state in a read destructive memory
11/06/2003WO2002086906A3 Method for the comparison of the address of a memory access with the already known address of a defective memory cell
11/06/2003WO2002075926A3 Antifuse reroute of dies
11/06/2003WO2002075336A3 Test system algorithmic program generators
11/06/2003US20030206477 Device and method for repairing a semiconductor memory
11/06/2003US20030206474 Sacrifice read test mode
11/06/2003US20030206470 Self-repair of embedded memory arrays
11/06/2003US20030206462 Circuit and method for testing a ferroelectric memory device
11/06/2003US20030206452 Semiconductor memory device having redundancy system
11/06/2003US20030206449 Flash EEprom system
11/06/2003US20030206438 Nonvolatile semiconductor memory device
11/05/2003EP1358678A1 Programmable memory address and decode circuits with ultra thin vertical body transistors
11/05/2003EP1158533B1 Eeprom array with flash-like core
11/05/2003CN1453793A Semiconductor memory with test mode and storing system using the same
11/05/2003CN1127090C Electronic test memory device
11/04/2003US6643830 Fault portion locating method for semiconductor integrated circuit device
11/04/2003US6643809 Semiconductor device and semiconductor device testing method
11/04/2003US6643807 Array-built-in-self-test (ABIST) for efficient, fast, bitmapping of large embedded arrays in manufacturing test
11/04/2003US6643805 Memory circuit being capable of compression test
11/04/2003US6643804 Stability test for silicon on insulator SRAM memory cells utilizing bitline precharge stress operations to stress memory cells under test
11/04/2003US6643794 Semiconductor storage unit
11/04/2003US6643725 Memory card having a buffer memory for storing testing instruction
11/04/2003US6643218 Precharge control signal generator, and semiconductor memory device using the same
11/04/2003US6643217 Semiconductor memory device permitting early detection of defective test data
11/04/2003US6643206 Timing fuse method for delaying signals in a memory device
11/04/2003US6643203 Semiconductor memory device including clock-independent sense amplifier
11/04/2003US6643198 RAM circuit with redundant word lines
11/04/2003US6643197 Semiconductor memory device and redundant output switch thereof
11/04/2003US6643196 Redundant memory circuit for analog semiconductor memory
11/04/2003US6643195 Self-healing MRAM
11/04/2003US6643193 Semiconductor device, microcomputer and flash memory
11/04/2003US6643191 Semiconductor device having chip selection circuit and method of generating chip selection signal
11/04/2003US6643180 Semiconductor memory device with test mode
11/04/2003US6643175 Nonvolatile semiconductor storage device and test method therefor
11/04/2003US6643166 Low power SRAM redundancy repair scheme
11/04/2003US6643164 Method and circuit for determining sense amplifier sensitivity
11/04/2003US6642734 Method and apparatus to generate a ground level of a semiconductor IC tester having a plurality of substrates
11/04/2003US6642725 Method of testing radiation for a SDRAM
11/04/2003US6642707 High-speed peaking circuit for characteristic impedance control
11/04/2003US6642084 Methods for forming aligned fuses disposed in an integrated circuit
10/2003
10/30/2003US20030204798 Optimized ECC/redundancy fault recovery
10/30/2003US20030204797 Memory testing device and method
10/30/2003US20030204796 Serial input/output testing method
10/30/2003US20030204795 Testing of ECC memories
10/30/2003US20030204783 Repair analyzer of dram in semiconductor integrated circuit using built-in CPU
10/30/2003US20030204782 CPU-based system and method for testing embedded memory
10/30/2003US20030204699 Method for embedding integrity metadata
10/30/2003US20030202417 Semiconductor memory device with reduced chip area and improved redundancy efficency
10/30/2003US20030202413 Semiconductor memory device and control method thereof
10/30/2003US20030202410 Semiconductor device with self refresh test mode
10/30/2003US20030202409 Semiconductor memory device having test mode and memory system using the same
10/30/2003US20030202395 Circuit for removing noise form power line and semiconductor memory device having the circuit
10/30/2003US20030202388 Integrated circuit having redundant, self-organized architecture for improving yield
10/30/2003US20030202387 Flexible redundancy for memories
10/30/2003US20030202386 Redundancy in chained memory architectures
10/30/2003US20030202377 Flash EEprom system
10/30/2003US20030201793 Line segmentation in programmable logic devices having redundancy circuitry
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