Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
02/2004
02/18/2004CN1139251C Detection-digital-signal processor in digital video-disk reproducing device
02/17/2004US6694495 Method of analyzing static current test vectors for semiconductor integrated circuits
02/17/2004US6694490 DIMM and method for producing a DIMM
02/17/2004US6694468 Method and apparatus to test memory
02/17/2004US6694461 System and method for testing integrated memories
02/17/2004US6694460 Semiconductor memory device having deterioration determining function
02/17/2004US6694448 SRAM row redundancy
02/17/2004US6693846 Command controller for an integrated circuit memory device and test circuitry thereof
02/17/2004US6693845 Semiconductor device having PLL-circuit
02/17/2004US6693834 Device and method for detecting alignment of bit lines and bit line contacts in DRAM devices
02/17/2004US6693833 Device and method for repairing a semiconductor memory
02/17/2004US6693831 Apparatus of repairing memory cell and method therefor
02/17/2004US6693829 Testing method for a reading operation in a non volatile memory
02/17/2004US6693818 Semiconductor storage apparatus
02/17/2004US6693437 Method and apparatus for identifying state-dependent, defect-related leakage currents in memory circuits
02/12/2004WO2002075336A9 Test system algorithmic program generators
02/12/2004US20040030972 Semiconductor memory device having time reduced in testing of memory cell data reading or writing, or testing of sense amplifier performance
02/12/2004US20040030971 Flash memory
02/12/2004US20040030970 Test platform device and method for testing embedded memory of system on chip
02/12/2004US20040030957 Various methods and apparatuses to track failing memory locations to enable implementations for invalidating repeatedly failing memory locations
02/12/2004US20040030955 Diagnostic memory interface test
02/12/2004US20040030512 Characterization of self-timed sequential circuits
02/12/2004US20040029301 Method and device for detecting whether the alignment of bit line contacts and active areas in DRAM devices is normal
02/12/2004US20040027898 Semiconductor memory device and its test method as well as test circuit
02/12/2004US20040027895 Semiconductor memory device and method for testing semiconductor memory device
02/12/2004US20040027887 Device for margin testing a semiconductor memory by applying a stressing voltage simultaneously to complementary and true digit lines
02/12/2004US20040027882 Semiconductor memory device and control method therefor
02/12/2004US20040027881 Memory card enabling simplified test process and memory card test method
02/12/2004US20040027880 Memory circuit with redundant memory cell array allowing simplified shipment tests and reduced power consumptions
02/12/2004US20040027878 Row decoder in flash memory and erase method of flash memory cell using the same
02/12/2004US20040027863 Semiconductor memory device with shift redundancy circuits
02/12/2004US20040027855 Dynamic sub-array group selection scheme
02/12/2004US20040027190 Clamp circuit with fuse options
02/12/2004US20040026716 Semiconductor integrated circuit device
02/12/2004DE19737838B4 Halbleiterspeichereinrichtung A semiconductor memory device
02/12/2004DE10315246A1 Halbleiter-Speichermodul A semiconductor memory module
02/12/2004DE10136544B4 Integrierter dynamischer Speicher und Betriebsverfahren Integrated dynamic memory and operating procedures
02/11/2004EP1388865A2 Semiconductor memory device and control method therefor
02/11/2004EP1388150A1 Integrated circuit with self-test device for an embedded non-volatile memory and related test method
02/11/2004CN1475015A Memory module and memory component with built-in self test function
02/11/2004CN1474416A Semiconductor storage of shortening detection time
02/10/2004US6691289 Semiconductor integrated circuit including circuit for selecting embedded tap cores
02/10/2004US6691276 Method for detecting and correcting failures in a memory system
02/10/2004US6691272 Testing of high speed DDR interface using single clock edge triggered tester data
02/10/2004US6691265 Method for creating defect management information in an recording medium, and apparatus and medium based on said method
02/10/2004US6691264 Built-in self-repair wrapper methodology, design flow and design architecture
02/10/2004US6691252 Cache test sequence for single-ported row repair CAM
02/10/2004US6690611 Cancellation of redundant elements with a cancel bank
02/10/2004US6690610 Enhanced fuse configurations for low-voltage flash memories
02/10/2004US6690241 Ring oscillator having variable capacitance circuits for frequency adjustment
02/10/2004US6690193 One-time end-user-programmable fuse array circuit and method
02/10/2004US6688369 Fabric light control window covering
02/05/2004WO2004012196A2 Semiconductor memory device and method for initializing the same
02/05/2004WO2003092012A3 Flexible redundancy for memories
02/05/2004US20040025095 Apparatus and methods for providing enhanced redundancy for an on-die cache
02/05/2004US20040025094 Masking error detection/correction latency in multilevel cache transfers
02/05/2004US20040024957 Window-based flash memory storage system and management and access methods thereof
02/05/2004US20040022249 Semiconductor memory device having faulty cells
02/05/2004US20040022115 Semiconductor memory device with improved test mode
02/05/2004US20040022110 Semiconductor memory device storing redundant replacement information with small occupation area
02/05/2004US20040022101 Method for testing a semiconductor memory having a plurality of memory banks
02/05/2004US20040022099 FIFO memory and semiconductor device
02/05/2004US20040022098 Semiconductor memory
02/05/2004US20040022093 Semiconductor memory device having improved replacement efficiency of defective word lines by redundancy word lines
02/05/2004US20040022092 Defects detection
02/05/2004US20040022087 Semiconductor memory device
02/05/2004US20040022086 Embedded recall apparatus and method in nonvolatile memory
02/05/2004DE10231680A1 Integrated memory with registers for storing data patterns for normal and test operation has enhanced registers for internal test pattern data
02/05/2004DE10231419A1 Signal calibration device and process to evaluate signals from signal producing circuits and adjust one to give a required comparison
02/05/2004DE10122081B4 Verfahren zum Kalibrieren eines Testsystems für eine integrierte Halbleiterschaltung und kalibrierbares Testystem A method for calibrating a test system for a semiconductor integrated circuit and calibratable Testystem
02/04/2004EP1387361A2 Semiconductor memory device
02/04/2004EP1387284A2 Computer system with nand flash memory for booting and data storage
02/04/2004EP1386398A2 Antifuse reroute of dies
02/04/2004EP0907128B1 Storage devices, and data processing systems and methods
02/04/2004CN1473336A Memory management logic for expanding utilization of read-only memories
02/04/2004CN1472810A Semiconductor integrated circuits
02/03/2004US6687867 Method for testing a memory array
02/03/2004US6687862 Apparatus and method for fast memory fault analysis
02/03/2004US6687861 Memory tester with enhanced post decode
02/03/2004US6687648 Method of predicting reliabilty of oxide-nitride-oxide based non-volatile memory
02/03/2004US6687174 Semiconductor memory device capable of switching output data width
02/03/2004US6687173 Circuit for testing ferroelectric capacitor in FRAM
02/03/2004US6687171 Flexible redundancy for memories
02/03/2004US6687170 System and method for storing parity information in fuses
02/03/2004US6687157 Circuits and methods for identifying a defective memory cell via first, second and third wordline voltages
02/03/2004US6687150 Reference voltage generation for memory circuits
02/03/2004US6686790 Low current redundancy anti-fuse method and apparatus
02/03/2004US6686786 Voltage generator stability indicator circuit
02/03/2004US6686776 Digital data coincidence determining circuit
01/2004
01/29/2004WO2004010437A1 Built-in-self-test of flash memory cells
01/29/2004WO2004010321A2 Processor array
01/29/2004WO2003054888A3 Non-volatile memory and method for operating a non-volatile memory
01/29/2004US20040019841 Internally generating patterns for testing in an integrated circuit device
01/29/2004US20040019838 Method, circuit and system for determining burn-in reliability from wafer level burn-in
01/29/2004US20040017716 Dynamic RAM-and semiconductor device
01/29/2004US20040017710 Test key for detecting overlap between active area and deep trench capacitor of a DRAM and detection method thereof
01/29/2004US20040017709 Active restore weak write test mode
01/29/2004US20040017708 Computer system with NAND flash memory for booting and storage
01/29/2004US20040017705 A Semiconductor memory device having improved arrangement for replacing failed bit lines
01/29/2004US20040017703 Semiconductor memory device