| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 03/04/2004 | US20040044932 Output data compression scheme using tri-state |
| 03/04/2004 | US20040044838 Non-volatile memory module for use in a computer system |
| 03/04/2004 | US20040044492 Semiconductor integrated circuit and memory test method |
| 03/04/2004 | US20040044491 Test circuit provided with built-in self test function |
| 03/04/2004 | US20040043522 Semiconductor memory device manufacturing method |
| 03/04/2004 | US20040042332 Semiconductor integrated circuit having latching means capable of scanning |
| 03/04/2004 | US20040042331 Semiconductor memory device with test mode |
| 03/04/2004 | US20040042312 Memory devices with selectively enabled output circuits for test mode and method of testing the same |
| 03/04/2004 | US20040042302 Method and article for concentrating fields at sense layers |
| 03/04/2004 | US20040042301 Semiconductor memory device |
| 03/04/2004 | US20040042299 Layout structure of fuse bank of semiconductor memory device |
| 03/04/2004 | US20040042297 Magnetic random access memory |
| 03/04/2004 | US20040042293 Semiconductor memory and method of testing the same |
| 03/04/2004 | US20040042289 Integrated memory circuit with a storage element and method for reading error information |
| 03/04/2004 | US20040042281 Semiconductor memory device |
| 03/04/2004 | US20040042280 Nonvolatile semiconductor memory device, nonvolatile semiconductor memory device-integrated system, and defective block detecting method |
| 03/04/2004 | US20040042279 Semiconductor device and a method of testing thereof |
| 03/04/2004 | US20040042275 Semiconductor memory device internally generating internal data read timing |
| 03/04/2004 | US20040042269 Nonvolatile memory apparatus |
| 03/04/2004 | US20040042262 Memory device capable of calibration and calibration methods therefor |
| 03/04/2004 | US20040042245 Coding cell of nonvolatile ferroelectric memory device and operating method thereof, and column repair circuit of nonvolatile ferroelectric memory device having the coding cell and method for repairing column |
| 03/04/2004 | US20040041579 Semiconductor chip test system and test method thereof |
| 03/04/2004 | US20040041574 Accelerated test method for ferroelectric memory device |
| 03/04/2004 | DE10228527B3 Verfahren zum Überprüfen der Refresh-Funktion eines Informationsspeichers Method for checking the refresh function of an information store |
| 03/03/2004 | EP1394812A1 Test circuit for semiconductor memory |
| 03/03/2004 | EP1394811A1 Accelerated test method for ferroelectric memory device |
| 03/03/2004 | EP1394810A1 Nonvolatile storage device and self-repair method for the same |
| 03/03/2004 | EP1394809A1 Nonvolatile semiconductor memory and method of operating the same |
| 03/03/2004 | EP1394808A2 Semiconductor memory |
| 03/03/2004 | EP1394560A2 Semiconductor chip test system and test method thereof |
| 03/03/2004 | EP1393087A1 Method for measuring fuse resistance in a fuse array |
| 03/03/2004 | EP1236051B1 Bit fail map compression with fail signature analysis |
| 03/03/2004 | CN1479366A Manufacturing method of semiconductor memory device |
| 03/03/2004 | CN1479309A Method and device for repairing shortage of memory |
| 03/03/2004 | CN1479304A Method for managing shortage position in data storage medium and recording medium |
| 03/03/2004 | CN1479301A Method and system for managing shortage position in data storage medium |
| 03/02/2004 | US6701480 System and method for providing error check and correction in memory systems |
| 03/02/2004 | US6701472 Methods for tracing faults in memory components |
| 03/02/2004 | US6701470 Method for testing a memory device having different number of data pads than the tester |
| 03/02/2004 | US6701003 Component identification system for electronic board testers |
| 03/02/2004 | US6700821 Programmable mosfet technology and programmable address decode and correction |
| 03/02/2004 | US6700818 Method for operating a memory device |
| 03/02/2004 | US6700816 Semiconductor storage device conducting a late-write operation and controlling a test read-operation to read data not from a data latch circuit but from a memory core circuit regardless |
| 03/02/2004 | US6700437 Semiconductor device including logic circuit and macro circuit which has a function for stopping a direct current |
| 03/02/2004 | US6700398 In-line D.C. testing of multiple memory modules in a panel before panel separation |
| 02/26/2004 | WO2004017162A2 System and method for self-testing and repair of memory modules |
| 02/26/2004 | WO2002057920A3 Simple fault tolerance for memory |
| 02/26/2004 | US20040039977 Tester system having a multi-purpose memory |
| 02/26/2004 | US20040039535 Repair of address-specific leakage |
| 02/26/2004 | US20040037150 disabling a high voltage generator responsive to a mode signal; and applying an external voltage to the semiconductor memory device through a pad responsive to the disabling |
| 02/26/2004 | US20040037149 Semiconductor memory device capable of normal transition to test mode |
| 02/26/2004 | US20040037148 improved gate dielectric characteristics |
| 02/26/2004 | US20040037131 Flash cell fuse circuit |
| 02/26/2004 | US20040037122 ROM memory device having repair function for defective cell and method for repairing the defective cell |
| 02/26/2004 | US20040037120 Storage system using fast storage devices for storing redundant data |
| 02/26/2004 | US20040037112 Nonvolatile semiconductor memory device having improved redundancy relieving rate |
| 02/26/2004 | US20040037105 Power reduction in cmos imagers by trimming of master current reference |
| 02/26/2004 | DE10336294A1 Temperature sensor circuit and method for definition of a trigger temperature for use with temperature controlled semiconductor components, whereby said circuit has a variable resistance circuit connected to a comparator circuit |
| 02/26/2004 | DE10326088A1 Autoeinstellung einer Selbstauffrischfrequenz Auto setting a Selbstauffrischfrequenz |
| 02/26/2004 | DE10321950A1 Rare-event injector for generating event, has circuitry that couples output of one circuitry to another circuitry for coupling events into circuitry of integrated circuit to stimulate error handling and recovery circuitry |
| 02/26/2004 | DE10310538A1 Halbleiterspeichervorrichtung mit verringerter Dauer des Tests des Speicherzellen-Datenschreibens oder -Datenlesens oder des Tests der Leseverstärkerleistung A semiconductor memory device with a reduced duration of the test of the memory cell or data writing -Datenlesens or the test, the sense amplifier power |
| 02/26/2004 | DE10232178B3 Checking device for address generator for testing device within IC, such as semiconductor memory IC, using storage of values of address signals provided by address generator |
| 02/25/2004 | EP1390951A2 Dynamic memory and method for testing a dynamic memory |
| 02/25/2004 | EP1303815B1 System initialization of microcode-based memory built-in self-test |
| 02/25/2004 | CN1478282A Method and apparatus for built-in self-repair of memoey storage arrays |
| 02/25/2004 | CN1477646A Semiconductor storage device |
| 02/25/2004 | CN1477645A Nonvolatile semiconductor memory with raised probability of redundant remedy |
| 02/25/2004 | CN1477644A Nonvolatile semiconductor storage and its operating method |
| 02/24/2004 | US6697992 Data storing method of dynamic RAM and semiconductor memory device |
| 02/24/2004 | US6697979 Method of repairing integrated circuits |
| 02/24/2004 | US6697978 Method for testing of known good die |
| 02/24/2004 | US6697295 Memory device having a programmable register |
| 02/24/2004 | US6697292 Semiconductor memory device capable of changing the selection order of sense amplifiers |
| 02/24/2004 | US6697291 Method for checking a conductive connection between contact points |
| 02/24/2004 | US6697290 Apparatus for random access memory array self-repair |
| 02/24/2004 | US6697289 Redundant address setting circuit and semiconductor memory device including the same |
| 02/24/2004 | US6697285 Semiconductor memory device |
| 02/24/2004 | US6697277 Content addressable memory (CAM) having a match line circuit with selectively adjustable pull-up impedances |
| 02/24/2004 | US6697275 Method and apparatus for content addressable memory test mode |
| 02/24/2004 | US6697037 TFT LCD active data line repair |
| 02/24/2004 | US6696867 Voltage generator with stability indicator circuit |
| 02/24/2004 | US6696714 Multichip semiconductor device having a hip with redundancy restoration fuse that affects a redundant memory array |
| 02/19/2004 | WO2004015717A2 Various methods and apparatuses to track failing memory locations to enable implementations for invalidating repeatedly failing memory locations |
| 02/19/2004 | WO2003043022A3 Memory unit test |
| 02/19/2004 | WO2003012796A3 Method for sharing redundant rows between banks for improved repari efficiency |
| 02/19/2004 | US20040034825 System and method for self-testing and repair of memory modules |
| 02/19/2004 | US20040034820 Apparatus and method for pseudorandom rare event injection to improve verification quality |
| 02/19/2004 | US20040032784 Apparatus for reducing bleed currents within a DRAM array having row-to-column shorts |
| 02/19/2004 | US20040032774 Non-volatile semiconductor memory device and data write control method for the same |
| 02/19/2004 | US20040032773 Programmable memory address and decode circuits with vertical body transistors |
| 02/19/2004 | US20040032766 Semiconductor memory devices with data line redundancy schemes and method therefore |
| 02/19/2004 | DE69719896T2 Integrierte Halbleiterschaltung mit Fehlererkennungsschaltung A semiconductor integrated circuit with an error detecting circuit |
| 02/19/2004 | DE10235454A1 Integrated memory and functional testing process for drams has address computing logic connected to an addressing unit |
| 02/19/2004 | DE10235380A1 Dynamic memory management method for a memory device with memory blocks storing a start program uses an interlinked list while testing |
| 02/19/2004 | DE10234944A1 Verfahren zum Testen eines Halbleiterspeichers mit mehreren Speicherbänken A method of testing a semiconductor memory having a plurality of memory banks |
| 02/19/2004 | DE10233910A1 Circuit for reading programmable connection has switch for connecting address input to volatile cell input, control circuit coupled to connection programming arrangement to provide activation signal |
| 02/19/2004 | DE10135775B4 Verfahren und Vorrichtungen zum Prüfen und Auslesen der Programmierung einer Hohlraumfuse Methods and apparatus for checking and reading out the programming of a Hohlraumfuse |
| 02/18/2004 | EP1389336A1 Test method for testing a data memory |
| 02/18/2004 | EP0768676B1 A semiconductor memory with sequential clocked access codes for test mode entry |
| 02/18/2004 | CN1475811A Semiconductor measurer and semiconductor measuring method |