| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) | 
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| 04/20/2004 | US6724671 Nonvolatile semiconductor memory device and method for testing the same | 
| 04/20/2004 | US6724670 Shared redundancy for memory having column addressing | 
| 04/20/2004 | US6724669 System and method for repairing a memory column | 
| 04/20/2004 | US6724668 Semiconductor device provided with memory chips | 
| 04/20/2004 | US6724667 Data memory with redundant memory cells used for buffering a supply voltage | 
| 04/20/2004 | US6724662 Method of recovering overerased bits in a memory device | 
| 04/20/2004 | US6724657 Semiconductor device with improved latch arrangement | 
| 04/20/2004 | US6724647 Variable logical circuit, semiconductor integrated circuit, and method for manufacturing semiconductor integrated circuit | 
| 04/15/2004 | WO2004031789A1 Test device and test method | 
| 04/15/2004 | WO2004031788A1 Multi-strobe device, test device, and adjustment method | 
| 04/15/2004 | US20040073841 Command set for a software programmable verification tool having a built-in self test (BIST) for testing and debugging an embedded device under test (DUT) | 
| 04/15/2004 | US20040073839 Software programmable verification tool having a single built-in self-test (BIST) module for testing and debugging multiple memory modules in a device under test (DUT) | 
| 04/15/2004 | US20040073829 Fail-over of multiple memory blocks in multiple memory modules in computer system | 
| 04/15/2004 | US20040071191 Temperature sensor and method for detecting trip temperature of a temperature sensor | 
| 04/15/2004 | US20040071028 Testing method and device for non-volatile memories having a LPC (low pin count) communication serial interface | 
| 04/15/2004 | US20040071009 Compilable address magnitude comparator for memory array self-testing | 
| 04/15/2004 | US20040070419 Semiconductor integrated circuit | 
| 04/15/2004 | US20040070418 Built-in self repair for an integrated circuit | 
| 04/15/2004 | DE10347467A1 Frequenzmultiplizierer und zugehöriges Multiplizierverfahren sowie Datenausgabepuffer und Halbleiterbaustein Frequency multiplier and associated multiplication method and data output buffer and semiconductor device | 
| 04/15/2004 | DE10341537A1 Halbleiterspeichervorrichtung und Testverfahren desselben unter Verwendung eines Zeilenkomprimierungstestmodus A semiconductor memory device and test method thereof using a row compression test mode | 
| 04/15/2004 | DE10334387A1 System und Verfahren zum Überwachen interner Spannungen auf einer integrierten Schaltung System and method for monitoring internal voltages on an integrated circuit | 
| 04/15/2004 | DE10326774A1 Auf-Chip Erfassung der Systemoperationsfrequenz in einem DRAM, um DRAM-Operationen einzustellen On-chip detection system of the operation frequency in a DRAM to set the DRAM operations | 
| 04/15/2004 | DE10246789B3 Integrated circuit testing arrangement comprises a measuring circuit for measuring operating values of a circuit that are representative of its operation, with an analysis circuit for detecting and evaluating voltage level changes | 
| 04/15/2004 | DE10245696B3 Speicherschaltung und Verfahren zum Auslesen von Daten Memory circuit and method for reading data | 
| 04/15/2004 | DE10245536A1 IC calibration method, especially for the output driver parameters, OCD and ODT, on chip driver and on die terminations, of DDR-DRAMs, whereby a common calibration reference is connected via a bus to multiple units | 
| 04/15/2004 | DE10242054B3 Teststruktur Test structure | 
| 04/14/2004 | EP1408516A1 A fuse blowing interface for a memory chip | 
| 04/14/2004 | EP1408515A1 Sub-column-repair-circuit | 
| 04/14/2004 | EP1408514A2 Semiconductor memory device and testing system and testing method | 
| 04/14/2004 | EP1408513A1 Carry decoder for a memory | 
| 04/14/2004 | EP1408512A1 Method for storing errors of a memory device in a diagnose array having a minimum storing size | 
| 04/14/2004 | CN1489766A Method and apparatus for analyzing and repairing memory | 
| 04/14/2004 | CN1489156A Storage test circuit | 
| 04/14/2004 | CN1488937A Strong dielectric storage accelerated test method | 
| 04/14/2004 | CN1145972C Automatic test method and circuit for RAM | 
| 04/14/2004 | CN1145970C Non-volatile semiconductor memory | 
| 04/14/2004 | CN1145956C Optical disc device and data reading method | 
| 04/13/2004 | US6721935 Coordinate transformation system for semiconductor device, coordinate transformation method and coordinate transformation program | 
| 04/13/2004 | US6721915 Memory testing method | 
| 04/13/2004 | US6721911 Method and apparatus for testing a memory array using compressed responses | 
| 04/13/2004 | US6721910 Semiconductor memory improved for testing | 
| 04/13/2004 | US6721904 System for testing fast integrated digital circuits, in particular semiconductor memory modules | 
| 04/13/2004 | US6721230 Integrated memory with memory cells in a plurality of memory cell blocks, and method of operating such a memory | 
| 04/13/2004 | US6721216 Memory addressing structural test | 
| 04/13/2004 | US6721215 Integrated dynamic memory and method for operating it | 
| 04/13/2004 | US6720785 Integrated circuit with test mode, and test configuration for testing an integrated circuit | 
| 04/13/2004 | US6720216 Programmable memory address and decode circuits with vertical body transistors | 
| 04/08/2004 | WO2004029987A1 Method and circuitry for identifying weak bits in an mram | 
| 04/08/2004 | WO2004029986A1 Historical information storage for integrated circuits | 
| 04/08/2004 | WO2004029982A2 Acceleration of the programming of a memory module with the aid of a boundary scan (bscan) register | 
| 04/08/2004 | WO2004029971A2 Hybrid fuses for redundancy | 
| 04/08/2004 | WO2004029939A1 Write-once type optical disc, and method and apparatus for managing defective areas on write-once type optical disc | 
| 04/08/2004 | WO2003040922A3 Multibit package error correction with non-restricted double bit error etection | 
| 04/08/2004 | US20040068684 Memory test system for peak power reduction | 
| 04/08/2004 | US20040068680 Method and apparatus for testing physical memory in an information handling system under conventional operating systems | 
| 04/08/2004 | US20040068674 Apparatus and methods for ferroelectric ram fatigue testing | 
| 04/08/2004 | US20040066695 Method of electrically blowing fuses under control of an on-chip tester interface apparatus | 
| 04/08/2004 | US20040066694 Apparatus for random access memory array self-repair | 
| 04/08/2004 | US20040066690 Error detection system for an information storage device | 
| 04/08/2004 | US20040066684 Semiconductor integrated circuit device | 
| 04/08/2004 | US20040066683 Method and apparatus for internally trimming output drivers and terminations in semiconductor devices | 
| 04/08/2004 | US20040066675 Nonvolatile semiconductor memory and its test method | 
| 04/08/2004 | DE10330111A1 Verfahren eines selbstreparierenden dynamischen Direktzugriffsspeichers A method of self-repairing dynamic random access memory | 
| 04/08/2004 | DE10245533A1 Teststruktur zum Bestimmen eines Dotierbereiches eines Elektrodenanschlusses zwischen einem Grabenkondensator und einem Auswahltransistor in einem Speicherzellenfeld Test structure for determining a doping region of the electrode terminal between a grave capacitor and a select transistor in a memory cell array | 
| 04/08/2004 | DE10150441B4 Verfahren zum Testen von Halbleiterspeichern A method for testing of semiconductor memories | 
| 04/08/2004 | DE10145745B4 Integrierte Schaltung und Verfahren zu ihrem Betrieb Integrated circuit and method for its operation | 
| 04/08/2004 | DE10139724B4 Integrierter dynamischer Speicher mit Speicherzellen in mehreren Speicherbänken und Verfahren zum Betrieb eines solchen Speichers Integrated dynamic memory with memory cells in a plurality of memory banks, and method for operating such a memory, | 
| 04/07/2004 | EP1405316A1 Non-volatile memory and accelerated test method for address decoder by added modified dummy memory cells | 
| 04/07/2004 | EP1405186A1 Device for and method of storing identification data in an integrated circuit | 
| 04/07/2004 | CN1488149A Fail analysis device | 
| 04/07/2004 | CN1487530A Non-volatile memory | 
| 04/07/2004 | CN1487527A Semiconductor memory capable of realizing redundant unit array correct alternation | 
| 04/07/2004 | CN1487525A Memory equipment capable of being calibrated and calibrating method thereof | 
| 04/07/2004 | CN1145172C Semiconductor IC device with internal test circuit | 
| 04/07/2004 | CN1145167C Integrated memory with storage unit having magnetic-resistance storage effect | 
| 04/06/2004 | US6718506 High speed DVD error correction engine | 
| 04/06/2004 | US6718496 Self-repairing semiconductor device having a testing unit for testing under various operating conditions | 
| 04/06/2004 | US6718494 Method and apparatus for preventing and recovering from TLB corruption by soft error | 
| 04/06/2004 | US6718487 Method for high speed testing with low speed semiconductor test equipment | 
| 04/06/2004 | US6718430 Window-based flash memory storage system and management and access methods thereof | 
| 04/06/2004 | US6717879 Semiconductor memory device requiring refresh operation | 
| 04/06/2004 | US6717871 Semiconductor device with flexible redundancy system | 
| 04/06/2004 | US6717870 Method for assessing the quality of a memory unit | 
| 04/06/2004 | US6717869 Integrated circuit having redundant, self-organized architecture for improving yield | 
| 04/06/2004 | US6717864 Latched sense amplifiers as high speed memory in a memory system | 
| 04/06/2004 | US6717862 Flash memory sector tagging for consecutive sector erase or bank erase | 
| 04/06/2004 | US6717859 Automatic program- and erase-voltage generation for EEPROM cells | 
| 04/06/2004 | US6717850 Efficient method to detect process induced defects in the gate stack of flash memory devices | 
| 04/06/2004 | US6717222 Three-dimensional memory | 
| 04/01/2004 | WO2004027780A1 Semiconductor memory | 
| 04/01/2004 | WO2004027615A2 Method of and apparatus for detecting an error in writing to persistent memory | 
| 04/01/2004 | WO2004027235A1 Method for controlling an engine with vgt and egr systems | 
| 04/01/2004 | US20040064769 Controlling the content of specific desired memory elements when testing integrated circuits using sequential scanning techniques | 
| 04/01/2004 | US20040064768 Memory circuit and method for reading out data | 
| 04/01/2004 | US20040064767 Method of self-repairing dynamic random access memory | 
| 04/01/2004 | US20040064284 Test method of memory IC function on device board with dynamic competing cycle | 
| 04/01/2004 | US20040062138 On-die detection of the system operation frequency in a DRAM to adjust DRAM operations | 
| 04/01/2004 | US20040062135 Semiconductor integrated circuit device and self-test method of memory macro | 
| 04/01/2004 | US20040062134 Semiconductor storage device formed to optimize test technique and redundancy technology | 
| 04/01/2004 | US20040062123 Nonvolatile semiconductor memory device able to detect test mode |