| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 05/04/2004 | US6732304 Semiconductor package having plurality of external connectors, system chip connected to first group of connectors, memory chip connected to system chip through data bus, data buffers for transferring data, test buffer for testing memory chip |
| 05/04/2004 | US6732229 Method and apparatus for memory redundancy with no critical delay-path |
| 05/04/2004 | US6731561 Semiconductor memory and method of testing semiconductor memory |
| 05/04/2004 | US6731560 Refresh apparatus for semiconductor memory device, and refresh method thereof |
| 05/04/2004 | US6731559 Synchronous semiconductor memory device |
| 05/04/2004 | US6731554 2T2C signal margin test mode using resistive element |
| 05/04/2004 | US6731553 Memory circuit having compressed testing function |
| 05/04/2004 | US6731552 Integrated dynamic memory and operating method |
| 05/04/2004 | US6731551 Testing memory using a stress signal |
| 05/04/2004 | US6731550 Redundancy circuit and method for semiconductor memory devices |
| 05/04/2004 | US6731547 Semiconductor integrated circuit including a plurality of macros that can be operated although their operational voltages are different from each other |
| 05/04/2004 | US6731538 Semiconductor memory device including page latch circuit |
| 05/04/2004 | US6731131 Circuit for an electronic semiconductor module |
| 05/04/2004 | US6731106 Measuring on-resistance of an output buffer with test terminals |
| 04/29/2004 | WO2004025663A3 Circuit and method for testing embedded dram circuits through direct access mode |
| 04/29/2004 | US20040083418 Data buffering system and method for optical recording device |
| 04/29/2004 | US20040083414 Method and apparatus for independent control of devices under test connected in parallel |
| 04/29/2004 | US20040083412 Testing logic and embedded memory in parallel |
| 04/29/2004 | US20040083335 Automated wear leveling in non-volatile storage systems |
| 04/29/2004 | US20040083333 Hybrid implementation for error correction codes within a non-volatile memory system |
| 04/29/2004 | US20040083330 Testing a multibank memory module |
| 04/29/2004 | US20040083070 Circuit and method for calibrating dram pullup Ron to pulldown Ron |
| 04/29/2004 | US20040082121 Semiconductor module and methods for functionally testing and configuring a semiconductor module |
| 04/29/2004 | US20040082087 Device and method for detecting alignment of active areas and memory cell structures in dram devices |
| 04/29/2004 | US20040081010 Method for programming a reference cell |
| 04/29/2004 | US20040081008 Semiconductor memory device with test mode and testing method thereof |
| 04/29/2004 | US20040081007 Apparatus of repairing memory cell and method therefor |
| 04/29/2004 | US20040081005 Memory system with channel multiplexing of multiple memory devices |
| 04/29/2004 | US20040080998 Unusable block management within a non-volatile memory system |
| 04/29/2004 | US20040080994 Configuration and method for checking an address generator |
| 04/29/2004 | US20040080988 Flash EEprom system |
| 04/29/2004 | US20040080976 Non-volatile semiconductor memory |
| 04/29/2004 | US20040080322 Method for calibrating semiconductor devices using a common calibration reference and a calibration circuit |
| 04/29/2004 | DE10296828T5 Halbleiterspeichertestgerät und Adressgenerator zur Defektanalyse Semiconductor memory tester and address generator for defect analysis |
| 04/29/2004 | DE10206249B4 Verfahren zum Erzeugen von Testsignalen für eine integrierte Schaltung sowie Testlogik A method for generating test signals for an integrated circuit and test logic |
| 04/29/2004 | DE10146149B4 Schaltungsanordnung zum Empfang eines Datensignals Circuitry for receiving a data signal |
| 04/28/2004 | EP1055174B1 Method for storing and operating data units in a security module and associated security module |
| 04/28/2004 | CN1492445A Semiconductor memory device for producing inner data readout time sequence in inner part |
| 04/28/2004 | CN1492294A Programmable fuse array circuit and method for disposable terminal user |
| 04/27/2004 | US6728931 Time data compression technique for high speed integrated circuit memory devices |
| 04/27/2004 | US6728922 Dynamic data space |
| 04/27/2004 | US6728912 SOI cell stability test method |
| 04/27/2004 | US6728911 System and method for testing memory systems |
| 04/27/2004 | US6728910 Memory testing for built-in self-repair system |
| 04/27/2004 | US6728903 Electric part test system |
| 04/27/2004 | US6728902 Integrated circuit having a self-test device for carrying out a self-test of the integrated circuit |
| 04/27/2004 | US6728899 On the fly defect slipping |
| 04/27/2004 | US6728851 Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices |
| 04/27/2004 | US6728819 Synchronous memory device |
| 04/27/2004 | US6728175 Information recording method and apparatus |
| 04/27/2004 | US6728159 Flexible multibanking interface for embedded memory applications |
| 04/27/2004 | US6728158 Semiconductor memory device |
| 04/27/2004 | US6728155 Serial access memory and data write/read method |
| 04/27/2004 | US6728149 Semiconductor memory device |
| 04/27/2004 | US6728148 Programmed value determining circuit, semiconductor integrated circuit device including the same, and method for determining programmed value |
| 04/27/2004 | US6728147 Method for on-chip testing of memory cells of an integrated memory circuit |
| 04/27/2004 | US6728146 Memory device and method for automatically repairing defective memory cells |
| 04/27/2004 | US6728138 Semiconductor memory device having faulty cells |
| 04/27/2004 | US6728133 Nonvolatile semiconductor memory device |
| 04/27/2004 | US6728123 Redundant array architecture for word replacement in CAM |
| 04/27/2004 | US6727532 Semiconductor integrated circuit device |
| 04/22/2004 | US20040078740 Memory tester uses arbitrary dynamic mappings to serialize vectors into transmitted sub-vectors and de-serialize received sub-vectors into vectors |
| 04/22/2004 | US20040078739 Semiconductor device |
| 04/22/2004 | US20040078731 Method for operating a processor-controlled system |
| 04/22/2004 | US20040078706 Bus interface timing adjustment device, method and application chip |
| 04/22/2004 | US20040078701 Semiconductor memory unit with repair circuit |
| 04/22/2004 | US20040078700 Apparatus and method for processing defects in memories |
| 04/22/2004 | US20040078698 Robotic Memory-Module Tester Using Adapter Cards for Vertically Mounting PC Motherboards |
| 04/22/2004 | US20040077110 Method for monitoring oxide quality |
| 04/22/2004 | US20040076056 Device and method for detecting alignment of deep trench capacitors and word lines in DRAM devices |
| 04/22/2004 | US20040076049 Write-once type optical disc, and method and apparatus for managing defective areas on write-once type optical disc |
| 04/22/2004 | US20040076048 Universal serial bus flash bay |
| 04/22/2004 | US20040076043 Reliable and secure updating and recovery of firmware from a mass storage device |
| 04/22/2004 | US20040076042 High performance memory column group repair scheme with small area penalty |
| 04/22/2004 | US20040076038 Non-volatile semiconductor memory device capable of rapid operation |
| 04/22/2004 | US20040075591 Circuit and method for generating mode register set code |
| 04/22/2004 | US20040075461 Device for reconfiguring a faulty storage assembly |
| 04/22/2004 | DE10331860A1 SERDES-Kooperation mit der Grenz-Abtast-Testtechnik SERDES cooperation with the boundary-scan test technology |
| 04/22/2004 | DE10296809T5 Halbleitertestgerät Semiconductor testing apparatus |
| 04/22/2004 | DE10296525T5 Chipinterne Schaltungen für ein Hochgeschwindigkeitsspeichertesten mit einem langsamen Speichertester On-chip circuits for high-speed memory testing with a slow memory tester |
| 04/22/2004 | DE10246790A1 Integrated memory has first mode in which first data item to be written in write cycle is written to cell field with latency, second mode with no latency is used, data item written in more rapidly |
| 04/22/2004 | DE10246741A1 Verfahren und Vorrichtung zum internen Abgleich von Ausgangstreibern und Terminierungen in Halbleitereinrichtungen Method and apparatus for internal adjustment of output drivers and terminations in semiconductor devices |
| 04/22/2004 | DE10245713A1 Testsystem und Verfahren zum Testen von Speicherschaltungen Test system and method for testing memory circuits |
| 04/22/2004 | DE10245712A1 Speicherschaltung mit einem Testmodus zum Schreiben von Testdaten Memory circuit with a test mode for writing test data |
| 04/22/2004 | DE10244977A1 Beschleunigung der Programmierung eines Speicherbausteins mit Hilfe eines Boundary Scan (BSCAN)-Registers Acceleration of programming a memory device using a Boundary Scan (BSCAN) register |
| 04/22/2004 | DE10196980T5 Fehleranalysevorrichtung Error analysis apparatus |
| 04/21/2004 | EP1411435A2 Command set for a software programmable verification tool having built-in selftest (bist) for testing and debugging an embedded device under test (dut) |
| 04/21/2004 | EP1411434A2 A software programmable verification tool having a single built-in self-test (bist) module for testing and debugging multiple memory modules in a device under test (dut) |
| 04/21/2004 | EP1411433A2 A software programmable verification tool having multiple built-in self-test (bist) modules for testing and debugging multiple devices under test (dut) |
| 04/21/2004 | EP1410208A2 Simple fault tolerance for memory |
| 04/21/2004 | EP1332501B1 Memory management logic for expanding the utilization of read-only memories |
| 04/21/2004 | EP1046121A4 Automatic test process with non-volatile result table store |
| 04/21/2004 | CN1491417A Programmable fuse and antifuse and method thereof |
| 04/21/2004 | CN1146919C Semi-conductor storage apparatus with displacement program circuit |
| 04/21/2004 | CN1146792C IC memory having redundancy |
| 04/21/2004 | CN1146731C Semiconductor device testing apparatus |
| 04/20/2004 | US6725414 Error correction chip for memory applications |
| 04/20/2004 | US6725405 Apparatus and method for providing a diagnostic problem determination methodology for complex systems |
| 04/20/2004 | US6725403 Efficient redundancy calculation system and method for various types of memory devices |
| 04/20/2004 | US6724679 Semiconductor memory device allowing high density structure or high performance |