| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 03/23/2004 | US6711705 Method of analyzing a relief of failure cell in a memory and memory testing apparatus having a failure relief analyzer using the method |
| 03/23/2004 | US6711703 Hard/soft error detection |
| 03/23/2004 | US6711082 Method and implementation of an on-chip self refresh feature |
| 03/23/2004 | US6711077 Wafer burn-in test and wafer test circuit |
| 03/23/2004 | US6711076 Active restore weak write test mode |
| 03/23/2004 | US6711075 Semiconductor wafer, semiconductor chip, and manufacturing method of semiconductor device |
| 03/23/2004 | US6711074 Circuit and method for repairing column in semiconductor memory device |
| 03/23/2004 | US6711057 Nonvolatile semiconductor memory device and method of retrieving faulty in the same |
| 03/23/2004 | US6711056 Memory with row redundancy |
| 03/23/2004 | US6711054 Semiconductor device, data processing system and a method for changing threshold of a non-volatile memory cell |
| 03/23/2004 | US6711047 Test circuit for an analog measurement of bit line signals of ferroelectric memory cells |
| 03/23/2004 | US6711042 Semiconductor device whereon memory chip and logic chip are mounted, making testing of memory chip possible |
| 03/23/2004 | US6711040 Saving content addressable memory power through conditional comparisons |
| 03/23/2004 | US6710631 256 Meg dynamic random access memory |
| 03/23/2004 | US6710630 256 Meg dynamic random access memory |
| 03/23/2004 | US6710619 Integrated circuit with programmable locking circuit |
| 03/23/2004 | US6710616 Wafer level dynamic burn-in |
| 03/23/2004 | CA2253968C Large-scale integrated circuit and method for testing a board of same |
| 03/18/2004 | WO2004023552A1 Multichp semiconductor device, test method, and system board |
| 03/18/2004 | WO2004023488A1 Reference voltage generation for memory circuits |
| 03/18/2004 | WO2004023239A2 Method of recovering overerased bits in a memory device |
| 03/18/2004 | WO2004001568A3 Single pin multilevel integrated circuit test interface |
| 03/18/2004 | WO2003046717A3 Method and test device for detecting addressing errors in control devices |
| 03/18/2004 | US20040054845 Method and apparatus for signaling between devices of a memory system |
| 03/18/2004 | US20040054482 Apparatus and method for calibrating signals |
| 03/18/2004 | US20040052149 Integrated microcontroller module and method for checking the functionality of an integrated memory of the microcontroller module |
| 03/18/2004 | US20040052143 Method of recovering overerased bits in a memory device |
| 03/18/2004 | US20040052134 Redundant array architecture for word replacement in CAM |
| 03/18/2004 | US20040052132 Integrated memory and method for checking the functioning of an integrated memory |
| 03/18/2004 | US20040052126 Method and circuit for determining sense amplifier sensitivity |
| 03/18/2004 | US20040052125 Circuit for use with switched reluctance machines |
| 03/18/2004 | US20040052121 Flash cell fuse circuit |
| 03/18/2004 | US20040052107 Thin film magnetic memory device capable of stably writing/reading data and method of fabricating the same |
| 03/18/2004 | US20040051549 Semiconductor device, method of testing the semiconductor device, and semiconductor integrated circuit |
| 03/18/2004 | US20040051548 Semiconductor integrated circuit having a semiconductor storage circuit and a test circuit for testing the semiconductor storage circuit |
| 03/18/2004 | DE10240670B3 Integrierte Speicherschaltung mit einem Speicherzellenfeld und Verfahren zum Testen einer integrierten Schaltung An integrated circuit memory comprising a memory cell array and methods for testing an integrated circuit |
| 03/18/2004 | CA2497528A1 Method of recovering overerased bits in a memory device |
| 03/17/2004 | EP1398870A1 Four quadrant switched reluctance drive |
| 03/17/2004 | EP1398796A1 Dedicated redundancy circuits for different operations in a flash memory device and methods of operating the same |
| 03/17/2004 | EP1397807A2 Asynchronous, high-bandwidth memory component using calibrated timing elements |
| 03/16/2004 | US6708302 Semiconductor module |
| 03/16/2004 | US6708298 Method for guaranteeing a minimum data strobe valid window and a minimum data valid window for DDR memory devices |
| 03/16/2004 | US6708295 Circuit and method, for storing data prior to and after determining failure |
| 03/16/2004 | US6708248 Memory system with channel multiplexing of multiple memory devices |
| 03/16/2004 | US6707742 Nonvolatile semiconductor memory device |
| 03/16/2004 | US6707737 Memory system capable of switching between a reference voltage for normal operation and a reference voltage for burn-in test |
| 03/16/2004 | US6707736 Semiconductor memory device |
| 03/16/2004 | US6707735 Semiconductor memory device |
| 03/16/2004 | US6707734 Method and circuit for accelerating redundant address matching |
| 03/16/2004 | US6707733 Semiconductor memory device |
| 03/16/2004 | US6707732 Method of quickly determining work line failure type |
| 03/16/2004 | US6707731 Integrated circuit memory devices with per-bit redundancy and methods of operation thereof |
| 03/16/2004 | US6707730 Semiconductor memory device with efficient and reliable redundancy processing |
| 03/16/2004 | US6707718 Generation of margining voltage on-chip during testing CAM portion of flash memory device |
| 03/16/2004 | US6707699 Historical information storage for integrated circuits |
| 03/16/2004 | US6707323 Semiconductor device, module having a plurality of semiconductor devices mounted thereon and system having a plurality of modules installed therein |
| 03/11/2004 | WO2004021022A2 Integrated circuit with embedded identification code |
| 03/11/2004 | US20040049727 Method and apparatus for allocating CRC codes in a flash ROM |
| 03/11/2004 | US20040049724 Built-in-self-test (BIST) of flash memory cells and implementation of BIST interface |
| 03/11/2004 | US20040049722 Failure analysis system, failure analysis method, a computer program product and a manufacturing method for a semiconductor device |
| 03/11/2004 | US20040049720 Circuit and method for testing embedded DRAM circuits through direct access mode |
| 03/11/2004 | US20040049711 Oscillation based access time measurement |
| 03/11/2004 | US20040049627 Method and system for controlling compact flash memory |
| 03/11/2004 | US20040047226 Testmode to increase acceleration in burn-in |
| 03/11/2004 | US20040047225 Semiconductor device having shared sense amplifier configuration |
| 03/11/2004 | US20040047222 Semiconductor memory device having improved redundancy scheme |
| 03/11/2004 | US20040047221 Semiconductor memory device requiring refresh operation |
| 03/11/2004 | US20040047220 Semiconductor memory device allowing reduction of I/O terminals |
| 03/11/2004 | US20040047218 Semiconductor memory cell and memory array using a breakdown phenomena in an ultra-thin dielectric |
| 03/11/2004 | US20040047202 Nonvolatile semiconductor memory |
| 03/11/2004 | US20040047192 Semiconductor device having a redundant memory cell and method for recovering the same |
| 03/11/2004 | US20040047171 Sensing test circuit |
| 03/11/2004 | US20040046615 Oscillation based cycle time measurement |
| 03/11/2004 | US20040046601 Circuit with fuse and semiconductor device having the same circuit |
| 03/11/2004 | US20040046586 Semiconductor integrated circuit |
| 03/11/2004 | DE10238279A1 Integrated semiconductor device with shift-register chain for trimming of generators, has parallel-series-converter in signal-connection with fuses storing trimming data |
| 03/10/2004 | EP1396863A1 Semiconductor memory device and method for testing semiconductor memory device |
| 03/10/2004 | CN1480953A Method for storing check code in memory and its device |
| 03/10/2004 | CN1480949A 半导体存储器件及其控制方法 The semiconductor memory device and control method |
| 03/10/2004 | CN1480948A Semiconductor memory able to reduce input/output terminal |
| 03/10/2004 | CN1480947A Semiconductor memory device and its checking method |
| 03/09/2004 | US6704922 Correcting method of mask and mask manufactured by said method |
| 03/09/2004 | US6704891 Method for verifying and improving run-time of a memory test |
| 03/09/2004 | US6704677 Method and apparatus for generating a data pattern for simultaneously testing multiple bus widths |
| 03/09/2004 | US6704238 Semiconductor memory device including data bus pairs respectively dedicated to data writing and data reading |
| 03/09/2004 | US6704236 Method and apparatus for verification of a gate oxide fuse element |
| 03/09/2004 | US6704231 Semiconductor memory device with circuit executing burn-in testing |
| 03/09/2004 | US6704229 Semiconductor test circuit for testing a semiconductor memory device having a write mask function |
| 03/09/2004 | US6704228 Semiconductor memory device post-repair circuit and method |
| 03/09/2004 | US6704227 Embedded memory and method of arranging fuses thereof |
| 03/09/2004 | US6704226 Semiconductor memory device having row repair circuitry |
| 03/09/2004 | US6704223 Non-volatile semiconductor memory |
| 03/09/2004 | US6704218 FeRAM with a single access/multiple-comparison operation |
| 03/09/2004 | US6703844 Method for determining the transit time of electrical signals on printed circuit boards using automatic standard test equipment |
| 03/04/2004 | WO2003075233A3 Smart card and method for avoiding software bug on such a smart card |
| 03/04/2004 | US20040044944 Method of and apparatus for controlling data storage system according to temperature, and medium |
| 03/04/2004 | US20040044938 System for testing different types of semiconductor devices in parallel at the same time |
| 03/04/2004 | US20040044935 Method and apparatus for improved integrated circuit memory testing |
| 03/04/2004 | US20040044934 Error bit method and circuitry for oscillation-based characterization |
| 03/04/2004 | US20040044933 Memory technology test apparatus |