| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 04/01/2004 | US20040062114 Semiconductor memory device |
| 04/01/2004 | US20040062111 Non-volatile semiconductor memory |
| 04/01/2004 | US20040062110 Antifuse option for row repair |
| 04/01/2004 | US20040062105 Active restore weak write test mode |
| 04/01/2004 | US20040062103 Memory circuit with a test mode for writing test data |
| 04/01/2004 | US20040062102 Test system and method for testing memory circuits |
| 04/01/2004 | US20040062099 Fail number detecting circuit of flash memory |
| 04/01/2004 | US20040062096 Rapidly testable semiconductor memory device |
| 04/01/2004 | US20040062095 Method for identification of faulty or weak functional logic elements under simulated extreme operating conditions |
| 04/01/2004 | US20040062090 Synchronous semiconductor memory device of fast random cycle system and test method thereof |
| 04/01/2004 | US20040062086 Method of recovering memory module, memory module and volatile memory |
| 04/01/2004 | US20040062078 Nonvolatile semiconductor memory device supplying proper program potential |
| 04/01/2004 | US20040061561 Sram process monitor cell |
| 04/01/2004 | US20040061560 Frequency multiplier and method of multiplying frequency of external clock signal, data output buffer, and semiconductor device including the frequency multiplier and the data output |
| 04/01/2004 | US20040061110 Test structure for determining a doping region of an electrode connection between a trench capacitor and a selection transistor in a memory cell array |
| 04/01/2004 | DE69909926T2 Nichtflüchtige Speicheranordnung und Verfahren zu ihrer Prüfung A nonvolatile memory device and method for its examination |
| 04/01/2004 | DE10341555A1 Topographiekorrektur zum Testen redundanter Arrayelemente Topography correction for testing redundant array elements |
| 04/01/2004 | DE10333527A1 Eine Vorrichtung und ein Verfahren zum Aktivieren eines Verkäufermodus auf einer integrierten Schaltung An apparatus and a method for enabling a vendor mode on an integrated circuit |
| 04/01/2004 | DE10243603A1 Measuring or trimming impedance in semiconducting component involves determining current flowing through pull-up or pull-down switching device with both switching devices activated in common |
| 04/01/2004 | DE10243471A1 Testschaltkreis einer integrierten Speicherschaltung zum Kodieren von Bewertungsdaten und Verfahren hierzu Test circuit of a memory integrated circuit for encoding evaluation data and method thereof |
| 04/01/2004 | DE10243470A1 Selbsttestschaltung Self-test circuit |
| 03/31/2004 | EP1403924A2 Fuse arrangement and semiconductor memory device |
| 03/31/2004 | EP1403880A1 Method for detecting a resistive path or a predeterminted potential in non-volatile memory electronic devices |
| 03/31/2004 | EP1403879A1 Method for replacing failed non-volatile memory cells and corresponding memory device |
| 03/31/2004 | EP1403874A1 Memory device |
| 03/31/2004 | EP1402537A1 Method for characterizing an active track and latch sense-amp (comparator) in a one time programmable (otp) salicided poly fuse array |
| 03/31/2004 | EP1402365A1 Method and circuit arrangement for memory error processing |
| 03/31/2004 | EP1402278A1 Method and apparatus for optimized parallel testing and access of electronic circuits |
| 03/31/2004 | CN1485856A Semiconductor storage device |
| 03/31/2004 | CN1144233C Method for testing electronic element |
| 03/31/2004 | CN1144232C Method and apparatus for detecting multiple cluster memory device with multiple memory clusters |
| 03/31/2004 | CN1144230C Semiconductor memory device with redundant decoder having small scale in circuitry |
| 03/30/2004 | US6715117 Method of testing a semiconductor memory device |
| 03/30/2004 | US6715116 Memory data verify operation |
| 03/30/2004 | US6715115 Semiconductor integrated circuit device capable of outputting leading data of a series of multiple burst-readout data without delay |
| 03/30/2004 | US6715114 Test method and apparatus for semiconductor device |
| 03/30/2004 | US6715105 Method for reducing stored patterns for IC test by embedding built-in-self-test circuitry for chip logic into a scan test access port |
| 03/30/2004 | US6715020 Synchronous integrated circuit device |
| 03/30/2004 | US6714625 Lithography device for semiconductor circuit pattern generation |
| 03/30/2004 | US6714478 Semiconductor memory device having divided word line structure |
| 03/30/2004 | US6714474 Method of checking the state of a capacitor fuse in which the voltage applied to the capacitor fuse is the same level as voltage applied to memory cells |
| 03/30/2004 | US6714469 On-chip compression of charge distribution data |
| 03/30/2004 | US6714468 Circuit and method for testing a memory device |
| 03/30/2004 | US6714467 Block redundancy implementation in heirarchical RAM's |
| 03/30/2004 | US6714466 System of performing a repair analysis for a semiconductor memory device having a redundant architecture |
| 03/30/2004 | US6714451 Semiconductor memory device including bit select circuit |
| 03/30/2004 | US6714449 Sense amplifier suitable for analogue voltage levels |
| 03/30/2004 | US6714430 Content addressable memory having column redundancy |
| 03/30/2004 | US6714038 Apparatus for controlling input termination of semiconductor memory device and method for the same |
| 03/30/2004 | US6713327 Stress controlled dielectric integrated circuit fabrication |
| 03/30/2004 | CA2386670C Method and apparatus for testing circuits with multiple clocks |
| 03/25/2004 | WO2004025664A2 Signal margin test circuit of a memory |
| 03/25/2004 | WO2004025663A2 Circuit and method for testing embedded dram circuits through direct access mode |
| 03/25/2004 | WO2004025517A1 Method and apparatus for integrating primary data storage with local and remote data protection |
| 03/25/2004 | WO2004025498A1 Method and apparatus for managing data integrity of backup and disaster recovery data |
| 03/25/2004 | WO2004025470A1 Primary and remote data backup with nodal failover |
| 03/25/2004 | WO2004025404A2 Method and apparatus for server share migration and server recovery using hierarchical storage management |
| 03/25/2004 | US20040060013 System and method for enabling a vendor mode on an integrated circuit |
| 03/25/2004 | US20040059986 Data playback equipment |
| 03/25/2004 | US20040059985 Method and apparatus for tracking address of memory errors |
| 03/25/2004 | US20040059976 Semiconductor integrated circuit device having a test circuit of a random access memory |
| 03/25/2004 | US20040059974 Reconfiguration device for faulty memory |
| 03/25/2004 | US20040059970 Multipurpose architecture and method for testing electronic logic and memory devices |
| 03/25/2004 | US20040059968 Method and apparatus for monitoring component latency drifts |
| 03/25/2004 | US20040059959 Semiconductor integrated circuit |
| 03/25/2004 | US20040059535 Circuit with interconnect test unit |
| 03/25/2004 | US20040057316 Nonvolatile memory |
| 03/25/2004 | US20040057309 Semiconductor memory device |
| 03/25/2004 | US20040057308 Semiconductor storage device |
| 03/25/2004 | US20040057307 Self-test circuit and a method for testing a memory with the self-test circuit |
| 03/25/2004 | US20040057303 Method and article for concentrating fields at sense |
| 03/25/2004 | US20040057302 Test circuit of an integrated memory circuit for coding assessment data and method for testing the memory circuit |
| 03/25/2004 | US20040057299 Memory card having a buffer memory for storing testing instruction |
| 03/25/2004 | US20040057296 Topography correction for testing of redundant array elements |
| 03/25/2004 | US20040057294 Redundancy scheme for a memory array |
| 03/25/2004 | US20040057293 Hybrid fuses for redundancy |
| 03/25/2004 | US20040057292 Test structure for measuring a junction resistance in a DRAM memory cell array |
| 03/25/2004 | US20040057289 System and method for monitoring internal voltages on an integrated circuit |
| 03/25/2004 | US20040057287 Non-volatile memory and method with reduced source line bias errors |
| 03/25/2004 | US20040057281 Thin film magnetic memory device storing program information efficiently and stably |
| 03/25/2004 | US20040057273 Historical information storage for integrated circuits |
| 03/25/2004 | DE69627595T2 Halbleiterspeicher und Verfahren zum Ersetzen einer redundanten Speicherzelle A semiconductor memory and method for replacing a redundant memory cell |
| 03/25/2004 | DE69626792T2 Elektrische löschbare und programmierbare nichtflüchtige Speicheranordnung mit prüfbaren Redundanzschaltungen Electrical erasable and programmable nonvolatile memory device with redundancy testable circuits |
| 03/25/2004 | DE10332590A1 Zeilendecodierer in einem Flashspeicher sowie Löschverfahren für eine Flashspeiicherzelle in diesem Row decoder in a flash memory and an erasing method for Flashspeiicherzelle in this |
| 03/25/2004 | DE10261457B3 Integrated circuit with transistor array of vertical FET selection transistors has array diagnosis test structure with two offset word, bit line combs alternately connecting different word, bit lines |
| 03/25/2004 | CA2497825A1 Method and apparatus for server share migration and server recovery using hierarchical storage management |
| 03/25/2004 | CA2497625A1 Method and apparatus for managing data integrity of backup and disaster recovery data |
| 03/25/2004 | CA2497306A1 Method and apparatus for integrating primary data storage with local and remote data protection |
| 03/25/2004 | CA2497305A1 Primary and remote data backup with nodal failover |
| 03/24/2004 | EP1399819A2 Improved error correction scheme for use in flash memory allowing bit alterability |
| 03/24/2004 | EP1290559B1 Dual-ported cams for a simultaneous operation flash memory |
| 03/24/2004 | EP1032870B1 A memory redundancy allocation system and a method of redundancy allocation |
| 03/24/2004 | CN1484835A Method for reading semiconductor die information in a parallel test and burn-in system |
| 03/24/2004 | CN1484247A Nonvolatile semiconductor storage equipment providing suitable programming voltage |
| 03/24/2004 | CN1143380C Memory system with reduced wire connections |
| 03/24/2004 | CN1143321C Decision method for semiconductor integrated circuit whether on not qualified and semiconductor integrated circuit |
| 03/24/2004 | CN1143320C Synchronous semiconductor storage device |
| 03/24/2004 | CN1143318C Semiconductor storage with auxiliary storage |
| 03/24/2004 | CN1143317C Semiconductor memory device having test mode |
| 03/24/2004 | CN1143307C Information recording method and apparatus |