Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
06/2004
06/17/2004US20040117697 Feedback cycle detection across non-scan memory elements
06/17/2004US20040117696 Method for testing semiconductor memory device and test circuit for semiconductor memory device
06/17/2004US20040117694 Repair techniques for memory with multiple redundancy
06/17/2004US20040117586 Direct logical block addressing flash memory mass storage architecture
06/17/2004US20040114454 Memory device and method for operating same
06/17/2004US20040114449 Semiconductor memory device for improvement of defective data line relief rate
06/17/2004US20040114446 Semiconductor memory
06/17/2004US20040114442 Semiconductor memory
06/17/2004US20040114433 Programmable fuse and antifuse and method therefor
06/17/2004US20040114432 Error recovery for nonvolatile memory
06/17/2004US20040114430 Semiconductor memory device
06/17/2004US20040114427 Semiconductor memory device and method for correcting memory cell data
06/17/2004US20040114424 Semiconductor memory device
06/17/2004US20040114417 Ferroelectric memory device comprising extended memory unit
06/17/2004US20040114414 Semiconductor memory device
06/17/2004US20040113607 In-Line D.C. Testing of Multiple Memory Modules in a Panel Before Panel Separation
06/17/2004US20040113176 Semiconductor device and method of the semiconductor device
06/17/2004DE69631106T2 On-line-Rekonfiguration einer Speicherplattenanordnung On-line reconfiguration of a disk array
06/17/2004DE69532030T2 Speicherplattenanordnung mit Ersatzbetriebsmitteln in Betrieb und Verfahren zur Verwendung von Ersatzbetriebsmitteln zum Speichern von Benutzerdaten Disk array with spare resources in organization and procedures for use of spare resources for storing user data
06/17/2004DE10354523A1 Semiconductor memory device for electronic equipment, has memory cell array divided into blocks and control circuit selectively controlling wordline control circuit to activate wordlines with same row address to change page length
06/17/2004DE10349606A1 Integrierte Schaltung in einer maximalen Eingangs/Ausgangskonfiguration Integrated circuit in a maximum input / output configuration
06/17/2004DE10335097A1 Speicherunterarrayauswahlüberwachung Memory subarray selection monitoring
06/17/2004DE10027003B4 Halbleiterschaltungsvorrichtung mit der Fähigkeit, Stromversorgungspotentiale extern an eine interne Schaltung anzulegen und dabei Rauschen einzuschränken Semiconductor integrated circuit device with the ability to create electricity supply potentials external to an internal circuit and thereby reduce noise
06/17/2004CA2507693A1 System and method for expanding a pulse width
06/17/2004CA2506543A1 Data recovery techniques in storage systems
06/16/2004EP1158534B1 Semiconductor memory device
06/16/2004EP1029278A4 Moving sequential sectors within a block of information in a flash memory mass storage architecture
06/16/2004CN1505151A Self-reparable semiconductor and method thereof
06/16/2004CN1505056A Nonvolatile semiconductor storage device and row-line short defect detection method
06/16/2004CN1505053A Semiconductor memory device and method for correcting memory cell data
06/16/2004CN1505050A 半导体集成电路器件 The semiconductor integrated circuit device
06/16/2004CN1505049A Repair fuse initialzing circuit using a flash memory cell
06/16/2004CN1505047A Semiconductor storage apparatus
06/16/2004CN1505044A Ferroelectric memory device comprising extended memory unit
06/16/2004CN1505038A Storage apparatus capable of prolixity displacement and high-speed reading-out
06/16/2004CN1504908A Memory system and controlling method thereof
06/15/2004US6751766 Increasing the effectiveness of error correction codes and operating multi-level memory systems by using information about the quality of the stored data
06/15/2004US6751763 Semiconductor device test method for optimizing test time
06/15/2004US6751762 Systems and methods for testing a memory
06/15/2004US6751760 Method and system for performing memory repair analysis
06/15/2004US6751755 Content addressable memory having redundancy capabilities
06/15/2004US6751696 Memory device having a programmable register
06/15/2004US6751156 Semiconductor memory system having dynamically delayed timing for high-speed data transfers
06/15/2004US6751144 Semiconductor storage and method for testing the same
06/15/2004US6751140 Method for testing integrated semiconductor memory devices
06/15/2004US6751139 Integrated circuit reset circuitry
06/15/2004US6751137 Column repair circuit in ferroelectric memory
06/15/2004US6751134 Internal voltage generating apparatus for a semiconductor memory device
06/15/2004US6751131 Semiconductor storage device and information apparatus
06/15/2004US6751128 Semiconductor memory device having shortened testing time
06/15/2004US6751121 Flash memory array architecture
06/15/2004US6750700 256 meg dynamic random access memory
06/15/2004US6750691 Semiconductor integrated circuit device and characteristic measurement method thereof
06/15/2004US6750671 Apparatus for testing semiconductor devices
06/15/2004US6750640 Method and apparatus providing final test and trimming for a power supply controller
06/15/2004US6750527 Semiconductor integrated circuit device having a plurality of wells, test method of testing the semiconductor integrated circuit device, and test device which executes the test method
06/10/2004WO2004049350A1 Method and system for defining a redundancy window around a particular column in a memory array
06/10/2004WO2004049343A1 A method and device to detect the likely onset of thermal relaxation in magnetic data storage devices
06/10/2004WO2004003750A3 Error detection/correction code which detects component failure and which provides single bit error correction upon such detection
06/10/2004US20040111655 Microcomputer and test method therefore
06/10/2004US20040111654 Memory device with debug mode
06/10/2004US20040111553 Zone boundary adjustment for defects in non-volatile memories
06/10/2004US20040111224 Memory defect remedy analyzing method and memory test instrument
06/10/2004US20040109379 Method of marginal erasure for the testing of flash memories
06/10/2004US20040109371 Memory circuit with redundant configuration
06/10/2004US20040109370 Integrated circuit with self-test device for an embedded non-volatile memory and related test method
06/10/2004US20040109368 Semiconductor integrated circuit device
06/10/2004US20040109360 Byte aligned redundancy for memory array
06/10/2004US20040109359 Integrated memory
06/10/2004US20040109357 Non-volatile memory and method with improved sensing
06/10/2004US20040109281 Semiconductor device having relief circuit for relieving defective portion
06/10/2004US20040108572 Fuse arrangement and integrated circuit device using the same
06/09/2004EP1426971A2 Semiconductor memory device and metohd for correcting memory cell data
06/09/2004EP1426780A2 Semiconductor device with data ports supporting simultanous bi-directional data sampling and method for testing the same
06/09/2004EP1425665A1 Method and device for testing a memory
06/09/2004EP1425594A1 Multilevel signal interface testing with binary test apparatus by emulation of multilevel signals
06/09/2004EP1425593A1 Built-in self-testing of multilevel signal interfaces
06/09/2004EP1158536B1 Semiconductor memory device
06/09/2004EP1158532B1 Semiconductor memory device
06/09/2004DE69629430T2 Austausch-Halbleiterfestwertspeicher Exchange-semiconductor-only memory
06/09/2004DE19519453B4 Halbleiterspeicher-Testvorrichtung The semiconductor memory test apparatus
06/09/2004DE10313872B3 Integrated circuit with testing facility provided by test circuit performing test sequence for operative circuit of IC in response to test signal
06/09/2004CN1503272A Circuit and method for changing page length in semiconductor memory
06/09/2004CN1503133A Non-volatile memory chip for computer and test method thereof
06/09/2004CN1153220C Semi-conductor storage device
06/09/2004CN1153068C Semiconductor device having contact check circuit
06/08/2004US6748564 Scan stream sequencing for testing integrated circuits
06/08/2004US6748562 Memory tester omits programming of addresses in detected bad columns
06/08/2004US6748561 Interleavers and de-interleavers
06/08/2004US6748556 Changing the thread capacity of a multithreaded computer processor
06/08/2004US6747907 Voltage detection level correction circuit and semiconductor device
06/08/2004US6747894 Nonvolatile multilevel cell memory
06/08/2004US6747627 Redundancy shift register circuit for driver circuit in active matrix type liquid crystal display device
06/08/2004US6747228 Enhanced grading and sorting of semiconductor devices using modular “plug-in” sort algorithms
06/03/2004WO2004047118A1 2t2c signal margin test mode using resistive element
06/03/2004WO2004047117A1 2t2c signal margin test mode using a defined charge and discharge of bl and /bl
06/03/2004WO2004047116A1 2t2c signal margin test mode using different pre-charge levels for bl and /bl
06/03/2004WO2004047115A1 2t2c signal margin test mode using a defined charge exchange between bl and /bl
06/03/2004WO2004029971A3 Hybrid fuses for redundancy
06/03/2004WO2004005946A3 Electronic circuit with test unit for testing interconnects