| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 08/04/2004 | EP1227504B1 Semiconductor memory device |
| 08/04/2004 | CN1518797A Antifuse reroute of dies |
| 08/04/2004 | CN1518744A Duty-cycle-efficent SRAM cell test |
| 08/04/2004 | CN1518743A Method for characterizing active track and latch sense-amp (comparator) in one time programmable (OTP) salicided poly fuse array |
| 08/04/2004 | CN1518696A Method and circuit arrangement for memory error processing |
| 08/04/2004 | CN1518086A Testing mode control device using nonvolatile ferroeletric storage |
| 08/04/2004 | CN1518005A Semiconductor memory of reducing power dissipation when ageing test |
| 08/04/2004 | CN1518004A Method of testing SDRAM device |
| 08/04/2004 | CN1517947A Nonvolatile memory |
| 08/04/2004 | CN1160738C Intergrated storage unit having storage cells and reference unit |
| 08/04/2004 | CN1160737C Semiconductor memory testing apparatus |
| 08/03/2004 | US6772386 Digital signal processing method, data recording and reproducing apparatus, and data recording medium that are resistant to burst errors |
| 08/03/2004 | US6772379 Apparatus for verifying the data retention in non-volatile memories |
| 08/03/2004 | US6772289 Methods and apparatus for managing cached CRC values in a storage controller |
| 08/03/2004 | US6772261 Interface that allows testing and using memory modules in computer systems not designed for the modules |
| 08/03/2004 | US6771558 Semiconductor memory device |
| 08/03/2004 | US6771555 Row access information transfer device using internal wiring of a memory cell array |
| 08/03/2004 | US6771554 Access delay test circuit for self-refreshing DRAM |
| 08/03/2004 | US6771549 Row-column repair technique for semiconductor memory arrays |
| 08/03/2004 | US6771545 Method for reading a non-volatile memory cell adjacent to an inactive region of a non-volatile memory cell array |
| 08/03/2004 | US6771541 Method and apparatus for providing row redundancy in nonvolatile semiconductor memory |
| 08/03/2004 | US6771088 Method and apparatus for testing semiconductor devices using the back side of a circuit board |
| 07/29/2004 | WO2004064075A1 Method for the recognition and/or correction of memory access errors and electronic circuit arrangement for carrying out said method |
| 07/29/2004 | WO2004063758A2 Semiconductor test system storing pin calibration data, commands and other data in non-volatile memory |
| 07/29/2004 | WO2004063756A1 Method and apparatus for detecting an unused state in a semiconductor circuit |
| 07/29/2004 | WO2003073356A8 Memory module assembly using partially defective chips |
| 07/29/2004 | US20040148557 Data storing method of dynamic RAM and semiconductor memory device |
| 07/29/2004 | US20040148153 Memory rewind and reconstruction for hardware emulator |
| 07/29/2004 | US20040148119 Semiconductor test apparatus |
| 07/29/2004 | US20040145963 Semiconductor device including duty cycle correction circuit |
| 07/29/2004 | US20040145959 Semiconductor memory device with reduced current consumption during standby state |
| 07/29/2004 | US20040145953 Semiconductor memory device reduced in power consumption during burn-in test |
| 07/29/2004 | US20040145946 Non-volatile semiconductor device having a means to relieve a deficient erasure address |
| 07/29/2004 | US20040145939 Non-volatile semiconductor storage device and production method thereof |
| 07/29/2004 | US20040145937 Semiconductor integrated circuit device having flip-flops that can be reset easily |
| 07/29/2004 | US20040145935 Memory module with a test device |
| 07/29/2004 | US20040145933 Semiconductor memory test apparatus and method for address generation for defect analysis |
| 07/29/2004 | US20040145408 Semiconductor device having logic circuit and macro circuit |
| 07/29/2004 | DE69630624T2 EEPROM-Matrix mit einem, dem "Flash"-Speicher ähnlichen Kern EEPROM array with one, the "flash" memory-like core |
| 07/29/2004 | DE10300781A1 Integrated memory chip test system and process for these has self test circuit and records and stores error data from tested cells |
| 07/29/2004 | DE10300532A1 Socket or adapter for use in semiconductor component testing systems, especially for memory component testing, is designed to permit solder-free mounting on a contact assembly |
| 07/29/2004 | DE10300531A1 Socket or adapter for use in semiconductor component testing systems, especially for memory component testing, has a connection pin that is inserted into a matching contact so that a clamped connection is formed |
| 07/29/2004 | DE10244757B3 Programmierung eines Speicherbausteins über ein Boundary Scan-Register Programming a memory module through a boundary scan register |
| 07/28/2004 | EP1441296A2 Methods and apparatus for verifying the operation of a circuit design |
| 07/28/2004 | EP1440372A2 Multibit package error correction with non-restricted double bit error detection |
| 07/28/2004 | EP1169677B1 Programmable read-only memory and method for operating said read-only memory |
| 07/28/2004 | EP0916140B1 Method and apparatus for self-testing multi-port rams |
| 07/28/2004 | CN1516200A Storage module with detector |
| 07/28/2004 | CN1516199A Semiconductor storage device with testing and redundant function |
| 07/28/2004 | CN1159854C Interleave address generator and method thereof |
| 07/28/2004 | CN1159724C Fuse initial circuit using rapid memory cell |
| 07/27/2004 | US6769087 Data storage device and method for controlling the device |
| 07/27/2004 | US6769084 Built-in self test circuit employing a linear feedback shift register |
| 07/27/2004 | US6769081 Reconfigurable built-in self-test engine for testing a reconfigurable memory |
| 07/27/2004 | US6768694 Method of electrically blowing fuses under control of an on-chip tester interface apparatus |
| 07/27/2004 | US6768685 Integrated circuit memory array with fast test mode utilizing multiple word line selection and method therefor |
| 07/27/2004 | US6768676 Nonvolatile semiconductor memory device |
| 07/27/2004 | US6768674 Non-volatile semiconductor memory device |
| 07/27/2004 | US6768150 Magnetic memory |
| 07/22/2004 | WO2004061862A1 Self-repair of memory arrays using preallocated redundancy (par) architecture |
| 07/22/2004 | WO2004061853A2 Method of address individual memory devices on a memory module |
| 07/22/2004 | WO2004061852A1 Enabling memory redundancy during testing |
| 07/22/2004 | WO2004061689A2 Two dimensional data eye centering for source synchronous data transfers |
| 07/22/2004 | WO2004061602A2 Method and apparatus for testing embedded cores |
| 07/22/2004 | US20040143784 System and method for correcting linear block code |
| 07/22/2004 | US20040143782 Semiconductor integrated circuit and test system for testing the same |
| 07/22/2004 | US20040143588 Database model system and method |
| 07/22/2004 | US20040141390 Capacitor of semiconductor device and method for manufacturing the same |
| 07/22/2004 | US20040141387 Semiconductor storage device |
| 07/22/2004 | US20040141384 Method and system for selecting redundant rows and columns of memory cells |
| 07/22/2004 | US20040141380 Synchronous output buffer, synchronous memory device and method of testing access time |
| 07/22/2004 | US20040141375 Semiconductor memory device including page latch circuit |
| 07/22/2004 | US20040141370 Memory device capable of calibration and calibration methods therefor |
| 07/22/2004 | US20040140835 Multiple trip point fuse latch device and method |
| 07/22/2004 | US20040140488 Semiconductor device |
| 07/22/2004 | US20040140466 Semiconductor device that can measure timing difference between input and output signals |
| 07/22/2004 | DE10356956A1 Interne Datengenerierung und Datenvergleich über ungenutzte externe Anschlüsse Internal data generation and data comparison unused external connections |
| 07/22/2004 | DE10229164B4 Speicherbaustein mit einem Datengenerator und einer Testlogik und Verfahren zum Testen von Speicherzellen eines Speicherbausteins Memory device with a data generator and a test logic and method for testing memory cells of a memory block |
| 07/21/2004 | EP1438721A2 Semiconductor storage unit provided with intersecting word and bit lines whereon are arranged magnetoresistive memory cells |
| 07/21/2004 | EP1200963A4 Testing rambus memories |
| 07/21/2004 | EP0933778B1 Nonvolatile semiconductor memory |
| 07/21/2004 | CN1514492A Semiconductor storage module |
| 07/21/2004 | CN1514491A Layered power source noise monitoring device of ultra large scale integrated circuit and system |
| 07/21/2004 | CN1514367A Method and device for detecting and deciding quick flashing storage card kind and insertion |
| 07/21/2004 | CN1514363A CPU imitation device and method |
| 07/21/2004 | CN1514332A Access rapid storage card method and device |
| 07/21/2004 | CN1158671C 信号发生器 Signal Generator |
| 07/21/2004 | CN1158666C Semiconductor memory devices |
| 07/21/2004 | CN1158664C Memory |
| 07/21/2004 | CN1158604C Disc driver and method for storing information on driver disc |
| 07/20/2004 | US6766491 Parity mirroring between controllers in an active-active controller pair |
| 07/20/2004 | US6766483 Semiconductor test apparatus |
| 07/20/2004 | US6766474 Multi-staged bios-based memory testing |
| 07/20/2004 | US6766468 Memory BIST and repair |
| 07/20/2004 | US6766409 Method of writing, erasing, and controlling memory for memory device |
| 07/20/2004 | US6765841 Semiconductor memory device and electronic instrument |
| 07/20/2004 | US6765832 Semiconductor memory device with word line shift configuration |
| 07/20/2004 | US6765827 Method and system for detecting defective material surrounding flash memory cells |
| 07/20/2004 | US6765279 Membrane 3D IC fabrication |
| 07/15/2004 | US20040139310 Information processing apparatus, memory management apparatus, memory management method, and information processing method |