| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 08/17/2004 | US6778933 Processing semiconductor devices having some defective input-output pins |
| 08/17/2004 | US6778457 Variable refresh control for a memory |
| 08/17/2004 | US6778456 Temperature detecting circuit |
| 08/17/2004 | US6778452 Circuit and method for voltage regulation in a semiconductor device |
| 08/17/2004 | US6778451 Semiconductor memory device for masking all bits in a test write operation |
| 08/17/2004 | US6778450 Programmable weak write test mode |
| 08/17/2004 | US6778449 Method and design for measuring SRAM array leakage macro (ALM) |
| 08/17/2004 | US6778440 Method and device for checking a group of cells in a non-volatile memory cells |
| 08/17/2004 | US6778437 Memory circuit for providing word line redundancy in a memory sector |
| 08/17/2004 | US6778432 Thin film magnetic memory device capable of stably writing/reading data and method of fabricating the same |
| 08/17/2004 | US6777957 Test structure to measure interlayer dielectric effects and breakdown and detect metal defects in flash memories |
| 08/17/2004 | US6777707 Semiconductor integrated circuit with voltage down converter adaptable for burn-in testing |
| 08/17/2004 | US6777645 High-speed, precision, laser-based method and system for processing material of one or more targets within a field |
| 08/12/2004 | WO2004068491A1 Data recording/reproducing system and method |
| 08/12/2004 | WO2004012196A3 Semiconductor memory device and method for initializing the same |
| 08/12/2004 | US20040158795 Method and apparatus for implementing infiniband transmit queue |
| 08/12/2004 | US20040158786 Concurrently programmable dynamic memory built-in self-test (BIST) |
| 08/12/2004 | US20040158783 System and method for analyzing electrical failure data |
| 08/12/2004 | US20040158775 Nonvolatile memory |
| 08/12/2004 | US20040158773 Test mode control device using nonvolatile ferroelectric memory |
| 08/12/2004 | US20040158675 Memory system and control method therefor |
| 08/12/2004 | US20040156252 Apparatus and method for dynamically repairing a semiconductor memory |
| 08/12/2004 | US20040156251 Nonvolatile memory system |
| 08/12/2004 | US20040156243 Circuit configuration for reading out a programmable link |
| 08/12/2004 | US20040156237 Block select circuit in a flash memory device |
| 08/12/2004 | US20040156224 Method and apparatus for verification of a gate oxide fuse element |
| 08/12/2004 | US20040156223 System and method for evaluating a semiconductor device pattern, method for controlling process of forming a semiconductor device pattern and method for monitoring a semiconductor device manufacturing process |
| 08/12/2004 | US20040155646 Testing apparatus and method for testing the contacting between a semiconductor device and a carrier |
| 08/12/2004 | US20040155302 Three-dimensional memory cells and peripheral circuits |
| 08/12/2004 | US20040155301 Three-dimensional-memory-based self-test integrated circuits and methods |
| 08/12/2004 | DE10244977B4 Beschleunigung der Programmierung eines Speicherbausteins mit Hilfe eines Boundary Scan (BSCAN)-Registers Acceleration of programming a memory device using a Boundary Scan (BSCAN) register |
| 08/11/2004 | EP1444700A2 Memory unit test |
| 08/11/2004 | EP1444699A1 Method for the reconfiguration of a memory |
| 08/11/2004 | EP1232399B1 High-speed failure capture apparatus and method for automatic test equipment |
| 08/11/2004 | EP1224479A4 Built-in spare row and column replacement analysis system for embedded memories |
| 08/11/2004 | CN1520597A Non-volatile memory and accelerated test method for address decoder by addes modified dummy memory cells |
| 08/11/2004 | CN1520553A Device for and method of storing identification data in integrated circuit |
| 08/11/2004 | CN1519945A 集成电路装置 The integrated circuit device |
| 08/11/2004 | CN1519862A Semiconductor device |
| 08/11/2004 | CN1519846A Appts. and method with checking and erasing and correcting functions |
| 08/11/2004 | CN1519573A Integrated circuit device including scan test circuit and methods of testing same |
| 08/11/2004 | CN1161791C Method and apparatus for correcting multilevel cell memory by using interleaving |
| 08/10/2004 | US6775796 Creation of memory array bitmaps using logical to physical server |
| 08/10/2004 | US6775795 Method and apparatus for testing an SDRAM memory used as the main memory in a personal computer |
| 08/10/2004 | US6775736 Embedded DRAM system having wide data bandwidth and data transfer data protocol |
| 08/10/2004 | US6775193 System and method for testing multiple embedded memories |
| 08/10/2004 | US6775192 Memory device tester and method for testing reduced power states |
| 08/10/2004 | US6775189 Option fuse circuit using standard CMOS manufacturing process |
| 08/10/2004 | US6774734 Ring oscillator circuit for EDRAM/DRAM performance monitoring |
| 08/10/2004 | US6774702 Fuse trimming failure test circuit for CMOS circuit |
| 08/10/2004 | US6774662 In-line D.C. testing of multiple memory modules in a panel before panel separation |
| 08/10/2004 | US6774655 Semiconductor device, method of testing the semiconductor device, and semiconductor integrated circuit |
| 08/05/2004 | WO2004066309A1 Multiple trip point fuse latch device and test method of the fuse |
| 08/05/2004 | US20040153947 Method for writing to a defect address memory, and test circuit having a defect address memory |
| 08/05/2004 | US20040153944 Error correcting memory access means and method |
| 08/05/2004 | US20040153925 Integrated memory and method for testing an integrated memory |
| 08/05/2004 | US20040153924 Nonvolatile memory microcomputer chip, and a method for testing the nonvolatile memory microcomputer chip |
| 08/05/2004 | US20040153922 Memory module with test structure |
| 08/05/2004 | US20040153920 Semiconductor test system having multitasking algorithmic pattern generator |
| 08/05/2004 | US20040153914 System and method for isolating a faulty switch, storage device or SFP in a daisy-chained configuration |
| 08/05/2004 | US20040153912 Memory modeling circuit with fault toleration |
| 08/05/2004 | US20040153911 Testing of a CAM |
| 08/05/2004 | US20040153910 Integrated memory and method for testing the memory |
| 08/05/2004 | US20040153904 [memory architecture and method for repairing a serial access memory] |
| 08/05/2004 | US20040153903 Method and circuit arrangement for memory error processing |
| 08/05/2004 | US20040153902 Serial flash integrated circuit having error detection and correction |
| 08/05/2004 | US20040153901 Distributed failure analysis memory for automatic test equipment |
| 08/05/2004 | US20040153900 Automation of fuse compression for an asic design system |
| 08/05/2004 | US20040153899 Memory device with data line steering and bitline redundancy |
| 08/05/2004 | US20040153890 Delay management system |
| 08/05/2004 | US20040153843 Method for comparing the address of a memory access with an already known address of a faulty memory cell |
| 08/05/2004 | US20040153817 Apparatus and method for detecting over-programming condition in multistate memory device |
| 08/05/2004 | US20040153793 Method and apparatus for testing embedded memory on devices with multiple processor cores |
| 08/05/2004 | US20040153752 Self-reparable semiconductor and method thereof |
| 08/05/2004 | US20040153747 Fault tolerant computer |
| 08/05/2004 | US20040153746 Mechanisms for embedding and using integrity metadata |
| 08/05/2004 | US20040153744 Simple fault tolerance for memory |
| 08/05/2004 | US20040153732 Semiconductor memory device having a test circuit |
| 08/05/2004 | US20040153730 Data reconstruction method and system wherein timing of data of data reconstruction is controlled in accordance with conditions when a failure occurs |
| 08/05/2004 | US20040153725 ROM redundancy in ROM embedded DRAM |
| 08/05/2004 | US20040153626 Semiconductor device and a method for checking state transition thereof |
| 08/05/2004 | US20040153599 Data compression read mode for memory testing |
| 08/05/2004 | US20040153274 Fail analysis device |
| 08/05/2004 | US20040151048 Semiconductor memory device capable of reading data of signature fuse through normal read operation and method of reading data of signature fuse in semiconductor memory device through normal read operation |
| 08/05/2004 | US20040151039 Semiconductor memory device testable with a single data rate and/or dual data rate pattern in a merged data input/output pin test mode |
| 08/05/2004 | US20040151037 Test method for testing a data memory |
| 08/05/2004 | US20040151029 Programmable memory cell using charge trapping in a gate oxide |
| 08/05/2004 | US20040151022 Memory trouble relief circuit |
| 08/05/2004 | US20040151017 Test circuit for memory |
| 08/05/2004 | US20040150441 Semiconductor device having PPL-circuit |
| 08/05/2004 | US20040150418 Burn-in board having an indirect fuse |
| 08/05/2004 | US20040150068 Membrane 3D IC fabrication |
| 08/05/2004 | US20040149396 Fabric light control window covering |
| 08/05/2004 | DE69817696T2 Warmaustausch von gespiegeltem Nachschreib-Cachespeicher Hot exchange of mirrored posted-write cache |
| 08/05/2004 | DE69724742T2 Speicherfeldprüfschaltung mit Fehlermeldung Speicherfeldprüfschaltung with error message |
| 08/05/2004 | DE19818853B4 Integrierte Logikschaltungsanordnung Integrated logic circuitry |
| 08/05/2004 | DE19801557B4 Kontakt-Prüfschaltung in einer Halbleitereinrichtung Contact check circuit in a semiconductor device |
| 08/05/2004 | DE10327234A1 Integrierte Halbleiterschaltung und Testsystem zum Testen derselben A semiconductor integrated circuit and test system for testing the same |
| 08/05/2004 | DE10292320T5 Verfahren und Vorrichtung zum Analysieren und Reparieren von Speicher Method and apparatus for analyzing and repairing memory |
| 08/05/2004 | DE10034897B4 Adresszähler zur Adressierung von synchronen hochfrequenten Digitalschaltungen, insbesondere Speicherbauelementen Address counter for addressing high-frequency synchronous digital circuits, in particular memory devices |