Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
10/2004
10/21/2004US20040207455 Semiconductor integrated circuit
10/21/2004US20040207381 Method and apparatus providing final test and trimming for a power supply controller
10/21/2004US20040207042 Structure and method for embedding capacitors in z-connected multi-chip modules
10/21/2004DE19727262B4 Halbleiterspeichervorrichtung mit über Leckdetektionsmittel gesteuerter Substratspannungserzeugungsschaltung A semiconductor memory device with more than leak detection means controlled substrate voltage generating circuit
10/21/2004DE10315189A1 Method for determining the number of erasure procedures carried out in memory block esp. for flash-memory modules, by using the generation index in data heading of corresponding memory block
10/21/2004DE102004010706A1 Selbsttrimmender Spannungsgenerator Self-trimming final voltage generator
10/20/2004EP1469481A2 Apparatus and method for managing bad blocks in a flash memory
10/20/2004EP1050053A4 Event phase modulator for integrated circuit tester
10/20/2004CN1538513A Method and system for improving testability and reducing test time for packaged integrated circuits
10/20/2004CN1538459A Semiconductor storage device
10/20/2004CN1538458A Redundant contrl circuit of true programmed prgram unit and semiconductor storage using it
10/20/2004CN1538274A Transmission channel and its control method
10/20/2004CN1172316C Integrated circuit testing device
10/20/2004CN1172313C Circuit device and method for accelerated ageing in magnetoresistance memory
10/20/2004CN1172241C Digital memory circuit
10/19/2004US6807649 Encryption keys for multiple drive fault tolerance
10/19/2004US6807598 Integrated circuit device having double data rate capability
10/19/2004US6807505 Circuit with interconnect test unit
10/19/2004US6807500 Method and apparatus providing improved data path calibration for memory devices
10/19/2004US6807121 Semiconductor memory device for realizing external 8K Ref/internal 4K Ref standard without lengthening the refresh cycle
10/19/2004US6807117 Semiconductor device having PLL-circuit
10/19/2004US6807116 Semiconductor circuit device capable of accurately testing embedded memory
10/19/2004US6807115 Method of testing a semiconductor integrated device
10/19/2004US6807114 Method and system for selecting redundant rows and columns of memory cells
10/19/2004US6807102 Nonvolatile semiconductor memory and its test method
10/19/2004US6806550 Evaluation configuration for semiconductor memories
10/14/2004WO2004088749A1 Semiconductor integrated circuit device and method for controlling semiconductor integrated circuit device
10/14/2004US20040205435 Non-binary address generation for ABIST
10/14/2004US20040205434 Integrated system logic and abist data compression for an SRAM directory
10/14/2004US20040205433 High reliability memory module with a fault tolerant address and command bus
10/14/2004US20040205429 Semiconductor storage device
10/14/2004US20040205428 Redundancy circuit and semiconductor device using the same
10/14/2004US20040205427 Semiconductor integrated circuit and test method thereof
10/14/2004US20040205426 Method of deciding error rate and semiconductor integrated circuit device
10/14/2004US20040205405 ABIST address generation
10/14/2004US20040205308 Integrated memory having redundant units of memory cells and method for testing an integrated memory
10/14/2004US20040204891 Semiconductor memory device having a test mode for testing an operation state
10/14/2004US20040202034 Nonvolatile memory with error correction for page copy operation and method thereof
10/14/2004US20040201399 System for testing integrated circuit devices
10/14/2004US20040201395 Test apparatus for testing integrated modules and method for operating a test apparatus
10/14/2004US20040201394 Method and system for improving testability and reducing test time for packaged integrated circuits
10/14/2004US20040201372 Method and apparatus for testing driver circuits of AMOLED
10/14/2004US20040201077 Semiconductor integrated circuit device and method of testing the same
10/14/2004US20040201054 DRAM array, method of manufacturing a DRAM array, and computer system
10/14/2004DE69333549T2 Halbleiterspeicheranordnung A semiconductor memory device
10/14/2004DE10110272B4 Halbleiterspeicher Semiconductor memory
10/13/2004EP1467379A1 Semiconductor memory device capable of accessing all memory cells
10/13/2004EP1218887A4 Method and apparatus for supplying regulated power to memory device components
10/13/2004EP1104579B1 Memory supervision
10/13/2004CN1537312A Memory cell structural test
10/13/2004CN1536581A Semiconductor integrated circuit and its check method
10/13/2004CN1171236C Ferroelectric random access memory device and method for testing short-lived unit
10/13/2004CN1171235C Integrated memory possessing bit line, word line and plate line and its working method
10/13/2004CN1171150C Data management apparatus, data management method, and data storage card
10/13/2004CN1171095C Method and apparatus for testing video display chip
10/12/2004US6804156 Semiconductor integrated circuit device
10/12/2004US6804155 Semiconductor storage device
10/12/2004US6804154 Semiconductor memory device including power generation circuit implementing stable operation
10/12/2004US6804153 Semiconductor memory device internally generating internal data read timing
10/12/2004US6804141 Dynamic reference voltage calibration integrated FeRAMS
10/12/2004US6804135 Content addressable memory having column redundancy
10/07/2004WO2004086411A1 Memory built-in self-test (bist) architecture having distributed command interpretation and generalized command protocol
10/07/2004WO2004086410A1 Tiered built-in self-test (bist) architecture for testing distributed memory modules
10/07/2004US20040199843 Tiered built-in self-test (BIST) architecture for testing distributed memory modules
10/07/2004US20040199841 Method and system for detecting a mode of operation of an integrated circuit, and a memory device including same
10/07/2004US20040199840 Semiconductor wiring substrate, semiconductor device, method for testing semiconductor device, and method for mounting semiconductor device
10/07/2004US20040199816 Test method for guaranteeing full stuck-at-fault coverage of a memory array
10/07/2004US20040199717 Semiconductor memory
10/07/2004US20040199714 Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices
10/07/2004US20040197951 Membrane IC fabrication
10/07/2004US20040197941 Semiconductor wiring substrate, semiconductor device, method for testing semiconductor device, and method for mounting semiconductor device
10/07/2004US20040196712 Semiconductor memory device
10/07/2004US20040196709 Chip testing within a multi-chip semiconductor package
10/07/2004US20040196707 Apparatus and method for managing bad blocks in a flash memory
10/07/2004US20040196706 Semiconductor storage device
10/07/2004US20040196703 Semiconductor memory device capable of relieving defective cell
10/07/2004US20040196693 Magnetic random access memory device having write test mode
10/07/2004US20040196080 Semiconductor integrated circuit device
10/07/2004US20040196061 Socket or adapter device for semiconductor devices, method for testing semiconductor devices, and system comprising at least one socket or adapter device
10/07/2004US20040196060 Method of identifying physical mapping of IC products
10/07/2004US20040196057 Socket or adapter device for semiconductor devices, method for testing semiconductor devices, and system comprising at least one socket or adapter device
10/07/2004US20040196022 Semiconductor device testing apparatus, system, and method for testing the contacting with semiconductor devices positioned one upon the other
10/07/2004US20040195672 Semiconductor wiring substrate, semiconductor device, method for testing semiconductor device, and method for mounting semiconductor device
10/07/2004DE10344625A1 Halbleiterspeichervorrichtung mit einer Verhinderungsfunktion betreffend eine Datenänderung aufgrund sich aufsummierender Störungen Semiconductor memory device with a prevention function on a data change is due aufsummierender disorders
10/07/2004DE10311373A1 Integrierter Speicher mit redundanten Einheiten von Speicherzellen und Verfahren zum Test eines integrierten Speichers Integrated memory having redundant units of memory cells and methods for testing an integrated memory
10/07/2004DE10259300B4 Halbleiter-Bauelement-Test-Gerät, Halbleiter-Bauelement-Test-System und Halbleiter-Bauelement-Test-Verfahren zum Testen der Kontaktierung bei übereinanderliegenden Halbleiter-Bauelementen The semiconductor device testing apparatus, the semiconductor device test system and semiconductor device testing method for testing the contact in superposed semiconductor devices
10/07/2004DE102004002219A1 Unterstütztes Speichersystem Supported storage system
10/07/2004CA2519618A1 Memory built-in self-test (bist) architecture having distributed command interpretation and generalized command protocol
10/06/2004EP1465204A2 Memory built-in self repair (MBISR) circuits / devices
10/06/2004EP1465203A1 Nonvolatile memory with page copy capability and method thereof
10/06/2004CN1534783A Semiconductor storage device
10/06/2004CN1534687A 半导体集成电路装置 The semiconductor integrated circuit device
10/06/2004CN1534304A Semiconductor testing circuit, semiconductor storage and semiconductor testing method
10/05/2004US6801989 Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same
10/05/2004US6801979 Method and apparatus for memory control circuit
10/05/2004US6801869 Method and system for wafer and device-level testing of an integrated circuit
10/05/2004US6801625 Apparatus and method for stripping parity bits from an input stream
10/05/2004US6801471 Fuse concept and method of operation
10/05/2004US6801462 Device and method for detecting alignment of deep trench capacitors and word lines in DRAM devices
10/05/2004US6801461 Built-in self-test arrangement for integrated circuit memory devices
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