G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation

Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
11/2004
11/03/2004	EP1473628A1 Information processing apparatus, memory management apparatus, memory management method, and information processing method
11/03/2004	CN1542944A 半导体集成电路器件 The semiconductor integrated circuit device
11/03/2004	CN1542862A Dynamic ram chip testing method and circuit
11/03/2004	CN1542861A Integrated circuit devices having improved duty cycle correction and methods of operating the same
11/03/2004	CN1542860A Integrated memory having redundant units of memory cells and method for testing an integrated memory
11/03/2004	CN1542859A 半导体存储器件 The semiconductor memory device
11/03/2004	CN1542857A Semiconductor nonvolatile storage device
11/03/2004	CN1542851A Circuit technique for column redundancy fuse latches
11/03/2004	CN1542850A Method and test device for determining a repair solution for a memory module
11/03/2004	CN1542849A Redundancy circuit and semiconductor device using the same
11/03/2004	CN1542841A 存储器电路 The memory circuit
11/03/2004	CN1542811A Method and apparatus for generating oscillating clock signal
11/03/2004	CN1174426C Semiconductor memory chip
11/02/2004	US6813752 Method of determining charge loss activation energy of a memory array
11/02/2004	US6813748 System and method for enabling a vendor mode on an integrated circuit
11/02/2004	US6813741 Address counter test mode for memory device
11/02/2004	US6813740 Method for the testing of electronic components
11/02/2004	US6813735 I/O based column redundancy for virtual ground with 2-bit cell flash memory
11/02/2004	US6813726 Restarting a coupling facility command using a token from another coupling facility command
11/02/2004	US6813696 Semiconductor memory device and method of controlling the same
11/02/2004	US6813678 Flash memory system
11/02/2004	US6813210 Semiconductor memory device requiring refresh operation
11/02/2004	US6813203 Semiconductor memory device and method for testing semiconductor memory device
11/02/2004	US6813202 Semiconductor integrated circuit device capable of shortening period required for performing data retention test
11/02/2004	US6813201 Automatic generation and validation of memory test models
11/02/2004	US6813200 Circuit configuration for reading out a programmable link
11/02/2004	US6813199 Semiconductor memory device with improved saving rate for defective chips
11/02/2004	US6813198 Semiconductor memory device and method of repairing the same
11/02/2004	US6813194 Bias distribution network for digital multilevel nonvolatile flash memory
11/02/2004	US6813184 NAND flash memory and method of erasing, programming, and copy-back programming thereof
11/02/2004	US6813183 Externally triggered leakage detection and repair in a flash memory device
11/02/2004	US6812488 Electrically programmable three-dimensional memory-based self test
11/02/2004	US6812487 Test key and method for validating the doping concentration of buried layers within a deep trench capacitors
10/2004
10/28/2004	WO2004093092A1 Magnetic memory cell including a fuse element for disconnecting the defective magnetic element
10/28/2004	WO2004092755A1 Test device
10/28/2004	US20040216017 Control circuit and method for testing memory control modle
10/28/2004	US20040216011 Extender Card with Intercepting EEPROM for Testing and Programming Un-Programmed Memory Modules on a PC Motherboard
10/28/2004	US20040216006 Semiconductor memory device capable of accessing all memory cells
10/28/2004	US20040215996 Memory card
10/28/2004	US20040214387 Methods for fabricating three dimensional integrated circuits
10/28/2004	US20040213061 Semiconductor device with self refresh test mode
10/28/2004	US20040213060 ROM-based controller monitor in a memory device
10/28/2004	US20040213059 Fault-tolerant solid state memory
10/28/2004	US20040213058 Semiconductor integrated circuit device having a test function
10/28/2004	US20040213057 Memory device having redundant memory cell
10/28/2004	US20040213056 Redundancy control circuit which surely programs program elements and semiconductor memory using the same
10/28/2004	US20040213052 Asynchronous, high-bandwidth memory component using calibrated timing elements
10/28/2004	US20040213051 Method and apparatus for improving stability and lock time for synchronous circuits
10/28/2004	US20040213050 Semiconductor integrated circuit device
10/28/2004	US20040213043 Integrated circuit including sensor to sense environmental data, method of compensating an MRAM integrated circuit for the effects of an external magnetic field, MRAM integrated circuit, and method of testing
10/28/2004	US20040212407 Semiconductor integrated circuit having system bus divided in stages
10/28/2004	US20040212388 High activity, spatially distributed radiation source for accurately simulating semiconductor device radiation environments
10/28/2004	DE19810814B4 Rechnersystem und Zustandskopierverfahren zur skalierbaren Software-Aktualisierung Computer system and State copying method for scalable software update
10/28/2004	DE10245713B4 Testsystem und Verfahren zum Testen von Speicherschaltungen Test system and method for testing memory circuits
10/28/2004	DE10234944B4 Verfahren zum Testen eines Halbleiterspeichers mit mehreren Speicherbänken A method of testing a semiconductor memory having a plurality of memory banks
10/28/2004	DE10230949B4 Integrierter Mikrocontroller-Baustein und Verfahren zur Funktionsüberprüfung eines integrierten Speichers des Mikrocontroller-Bausteins Integrated microcontroller module and method for functional verification of an integrated memory of the microcontroller block
10/28/2004	DE102004016323A1 Redundanzsteuerschaltung zum sicheren Programmieren von Programmelementen und Halbleiterspeicher zur Verwendung derselben Redundancy control circuit for safe programming of program elements and semiconductor memory for using the same
10/28/2004	DE102004010838A1 Verfahren zum Bereitstellen von Adressinformation über ausgefallene Feldelemente und das Verfahren verwendende Schaltung A method for providing address information about failed field elements and the process circuit used
10/27/2004	EP1471537A1 TCAM device and operating method
10/27/2004	CN1541336A Electronic circuit and method for testing
10/27/2004	CN1540673A Method for testing thin oxidizing layer of semiconductor memory cell by using breakdown voltage
10/27/2004	CN1540669A Memory element for addressing according to content
10/27/2004	CN1540668A Non-volatile semiconductor memory
10/27/2004	CN1540464A Electricity saving controlling circuit in electronic equipment and method for saving electricity
10/27/2004	CN1173392C Equipment and method for screening test of fault leakage of storage device
10/26/2004	US6810498 RAM functional test facilitation circuit with reduced scale
10/26/2004	US6810490 Storage device, data processing system and data writing and readout method
10/26/2004	US6810344 Semiconductor testing method and semiconductor testing apparatus for semiconductor devices, and program for executing semiconductor testing method
10/26/2004	US6809988 Semiconductor memory with address input selection circuits
10/26/2004	US6809982 Defective cell remedy method capable of automatically cutting capacitor fuses within the fabrication process
10/26/2004	US6809975 Semiconductor memory device having test mode and memory system using the same
10/26/2004	US6809974 Controller for delay locked loop circuits
10/26/2004	US6809973 Flash memory device capable of repairing a word line
10/26/2004	US6809972 Circuit technique for column redundancy fuse latches
10/26/2004	US6809969 Non-volatile semiconductor memory device capable of rapid operation
10/26/2004	US6809545 Programmable power adjust for microelectronic devices
10/26/2004	US6809404 Semiconductor device
10/26/2004	US6808945 Method and system for testing tunnel oxide on a memory-related structure
10/21/2004	WO2004090910A1 Semiconductor memory device having redundancy means
10/21/2004	WO2004090723A2 A high reliability memory module with a fault tolerant address and command bus
10/21/2004	US20040210817 Algorithm to test LPAR I/O subsystem's adherence to LPAR I/O firewalls
10/21/2004	US20040210803 Built-in self-analyzer for embedded memory
10/21/2004	US20040210802 Redundancy register architecture for soft-error tolerance and methods of making the same
10/21/2004	US20040210729 Nonvolatile memory
10/21/2004	US20040210718 Device and method for configuring a cache tag in accordance with burst length
10/21/2004	US20040210414 Method for measuring the delay time of a signal line
10/21/2004	US20040208097 Method for creating defect management information in an recording medium, and apparatus and medium based on said method
10/21/2004	US20040208071 Semiconductor memory device
10/21/2004	US20040208070 Semiconductor memory device, repair search method, and self-repair method
10/21/2004	US20040208069 Column repair circuit
10/21/2004	US20040208068 Row redundancy circuit and repair method
10/21/2004	US20040208067 Row redundancy circuit
10/21/2004	US20040208066 Register file apparatus and method for computing flush masks in a multi-threaded processing system
10/21/2004	US20040208065 Row redundancy memory repair scheme with shift ot eliminate timing penalty
10/21/2004	US20040208063 Method for erasing non-volatile memory cells and corresponding memory device
10/21/2004	US20040208060 Storage device employing a flash memory
10/21/2004	US20040208055 Methods and circuits for testing programmability of a semiconductor memory cell and memory array using a breakdown phenomenon in an ultra-thin dielectric
10/21/2004	US20040208052 Thin film magnetic memory device capable of conducting stable data read and write operations
10/21/2004	US20040208048 Timing generator and test apparatus
10/21/2004	US20040208037 Distributed, highly configurable modular predecoding

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