| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 01/27/2005 | DE19601547B4 Speicherschaltung, Datensteuerschaltung der Speicherschaltung und Adressenzuweisungsschaltung der Speicherschaltung Memory circuit, data storage circuit of the control circuit and address assignment circuit of the memory circuit |
| 01/27/2005 | DE10334801B3 Semiconductor circuit for exchanging external data, addresses and/or commands during normal operation has a test interface for a test operation with a built-in self-test |
| 01/27/2005 | DE10328709A1 Semiconductor component test method in which a series of tests are applied to the components with the results of one test used to modify or even cancel the next test |
| 01/27/2005 | DE102004028340A1 Verringern von Speicherausfällen in integrierten Schaltungen Reducing memory failures in integrated circuits |
| 01/27/2005 | DE102004008217A1 Schnittstellen für einen nicht-flüchtigen gepufferten Speicher Interfaces for a non-volatile buffer memory |
| 01/27/2005 | DE102004008216A1 Programmierbare Schwachschreibtestmodus-(PWWTM-) Vorspannungserzeugung mit Voreinstellungsmodus mit logisch hoher Ausgabe Programmable Schwachschreibtestmodus- (PWWTM-) bias voltage with preset mode with logic high output |
| 01/26/2005 | EP1500111A2 Flexible redundancy for memories |
| 01/26/2005 | EP1500109A1 Redundancy in chained memory architectures |
| 01/26/2005 | EP1143256B1 Test device for the functional testing of a semiconductor chip |
| 01/26/2005 | EP0947995B1 Weak bit testing |
| 01/26/2005 | EP0920699B1 Antifuse detect circuit |
| 01/26/2005 | CN1571159A Semiconductor device, system device using it, and manufacturing method of a semiconductor device |
| 01/26/2005 | CN1571134A Light shield detecting method for mask ROM |
| 01/26/2005 | CN1571069A Nonvolatile memory system |
| 01/26/2005 | CN1186818C Metal wire fused wire structure possessing cavity body |
| 01/26/2005 | CN1186725C Column redundancy circuit with reduced signal path delay |
| 01/25/2005 | US6848071 Method and apparatus for updating an error-correcting code during a partial line store |
| 01/25/2005 | US6848070 Error correcting code scheme |
| 01/25/2005 | US6848067 Multi-port scan chain register apparatus and method |
| 01/25/2005 | US6847574 Enhanced fuse configuration for low-voltage flash memories |
| 01/25/2005 | US6847565 Memory with row redundancy |
| 01/25/2005 | US6847564 Semiconductor memory device capable of relieving defective cell |
| 01/25/2005 | US6847563 Semiconductor storage device and method for remedying defects of memory cells |
| 01/25/2005 | US6847554 Nonvolatile semiconductor memory device with error detection and correction circuit |
| 01/25/2005 | US6847553 Techniques of recovering data from memory cells affected by field coupling with adjacent memory cells |
| 01/25/2005 | US6847552 Flash array implementation with local and global bit lines |
| 01/25/2005 | US6847538 Double operation speed in DRAM with new memory cell configuration |
| 01/25/2005 | CA2421047C Method and apparatus for optimized parallel testing and access of electronic circuits |
| 01/20/2005 | WO2005006394A2 Circuit for testing and fine tuning integrated circuit (switch control circuit) |
| 01/20/2005 | WO2005006345A1 Semiconductor storage device |
| 01/20/2005 | WO2005006173A2 Data storage array |
| 01/20/2005 | US20050015700 Raid 3 + 3 |
| 01/20/2005 | US20050015698 Method of error correction coding, and apparatus for and method of recording data using the coding method |
| 01/20/2005 | US20050015697 Platform independent file manipulation |
| 01/20/2005 | US20050015693 Semiconductor integrated circuit verification system |
| 01/20/2005 | US20050015691 Semiconductor integrated circuit device and test method thereof |
| 01/20/2005 | US20050015690 Semiconductor device |
| 01/20/2005 | US20050015671 On-chip testing of embedded memories using Address Space Identifier bus in SPARC architectures |
| 01/20/2005 | US20050015654 Circuits and methods for repairing defects in memory devices |
| 01/20/2005 | US20050015533 Procedure and device for identifying an operating mode of a controlled device |
| 01/20/2005 | US20050014308 Manufacturing process of memory module with direct die-attachment |
| 01/20/2005 | US20050013188 Read/program potential generating circuit |
| 01/20/2005 | US20050013176 Circuit and method of generating a boosted voltage |
| 01/20/2005 | US20050013174 System of multiplexed data lines in a dynamic random access memory |
| 01/20/2005 | DE10330037B3 Adapter card for operation of data processor memory module in different test modes via memory device of adapter card holding test mode data and data bus selectively coupled to memory module interface |
| 01/20/2005 | DE102004029845A1 Testverfahren für einen Halbleiterspeicherbaustein, Testvorrichtung und Halbleiterspeicherbaustein Test method for a semiconductor memory device, test device and semiconductor memory device |
| 01/19/2005 | EP1498906A1 A redundancy scheme for an integrated memory circuit |
| 01/19/2005 | EP1497730A1 Methods for storing data in non-volatile memories |
| 01/19/2005 | EP1190264B1 Integrated circuit and method for determining the current yield of a part of the integrated circuit |
| 01/19/2005 | EP0898786B1 Method and apparatus for programming anti-fuses using internally generated programming voltage |
| 01/19/2005 | CN1568524A Semiconductor memory having mutually crossing word and bit lines, at which magnetoresistive memory cells are arranged |
| 01/19/2005 | CN1567482A Automatic variable timing structure for recovering writing using low speed tester |
| 01/19/2005 | CN1567215A Low powered backup and repair structure of static random access memory |
| 01/18/2005 | US6845478 Method and apparatus for collecting and displaying bit-fail-map information |
| 01/18/2005 | US6845477 Semiconductor test device for conducting an operation test in parallel on many chips in a wafer test and semiconductor test method |
| 01/18/2005 | US6845476 Method for testing a non-volatile memory |
| 01/18/2005 | US6845472 Memory sub-system error cleansing |
| 01/18/2005 | US6845460 Device and system for adjusting delay in a data path based on comparison of data from a latch and data from a register |
| 01/18/2005 | US6845422 Data-storing device |
| 01/18/2005 | US6845407 Semiconductor memory device having externally controllable data input and output mode |
| 01/18/2005 | US6845048 System and method for monitoring internal voltages on an integrated circuit |
| 01/18/2005 | US6845043 Method of verifying a semiconductor integrated circuit apparatus, which can sufficiently evaluate a reliability of a non-destructive fuse module after it is assembled |
| 01/18/2005 | US6845029 Flash cell fuse circuit |
| 01/18/2005 | US6844750 Current mirror based multi-channel leakage current monitor circuit and method |
| 01/18/2005 | US6844207 Method and device for detecting whether the alignment of bit line contacts and active areas in DRAM devices is normal |
| 01/13/2005 | WO2005003797A1 Memory bus checking procedure |
| 01/13/2005 | WO2004075257A3 Memory having variable refresh control and method therefor |
| 01/13/2005 | US20050010844 Method for testing a circuit which is under test, and circuit configuration for carrying out the method |
| 01/13/2005 | US20050010841 Memory module and method of testing the same |
| 01/13/2005 | US20050010834 Method and apparatus for determining the write delay time of a memory |
| 01/13/2005 | US20050010737 Configurable width buffered module having splitter elements |
| 01/13/2005 | US20050007866 Method and circuit for precise timing of signals in an embedded dram array |
| 01/13/2005 | US20050007860 Nonvolatile memory |
| 01/13/2005 | US20050007843 Redundancy circuit in semiconductor memory device having a multiblock structure |
| 01/13/2005 | US20050007841 Semiconductor memory apparatus and self-repair method |
| 01/13/2005 | US20050007822 Integrated circuit memory devices including programmed memory cells and programmable and erasable memory cells |
| 01/13/2005 | US20050007805 Configurable width buffered module having flyby elements |
| 01/13/2005 | US20050007172 Semiconductor integrated circuit device |
| 01/13/2005 | US20050007143 Fault tolerant semiconductor system |
| 01/13/2005 | US20050007140 Apparatus and method for performing parallel test on integrated circuit devices |
| 01/13/2005 | DE10327549A1 Verfahren und Vorrichtung zur Fehlererkennung für einen Cachespeicher und entsprechender Cachespeicher Method and apparatus for error detection for a cache memory and a corresponding cache memory |
| 01/13/2005 | DE10297436T5 Zeitgenerator und Prüfvorrichtung Time Generator and Tester |
| 01/13/2005 | DE10297426T5 Halbleiterprüfgerät Semiconductor tester |
| 01/13/2005 | DE102004007644A1 Vorrichtung und Verfahren zum Komprimieren von Redundanzinformationen für eingebettete Speicher, einschliesslich Cachespeicher, integrierter Schaltungen The apparatus and method of compressing information for redundancy embedded memory, including cache memory, integrated circuits |
| 01/12/2005 | EP1496519A2 Encoding method and memory apparatus |
| 01/12/2005 | EP1425594A4 Multilevel signal interface testing with binary test apparatus by emulation of multilevel signals |
| 01/12/2005 | EP1425593A4 Built-in self-testing of multilevel signal interfaces |
| 01/11/2005 | USRE38685 Data-output driver circuit and method |
| 01/11/2005 | US6842874 Method and apparatus for redundant location addressing using data compression |
| 01/11/2005 | US6842867 System and method for identifying memory modules having a failing or defective address |
| 01/11/2005 | US6842712 Method for testing an electronic component; computer program product, computer readable medium, and computer embodying the method; and method for downloading the program embodying the method |
| 01/11/2005 | US6842398 Multi-mode synchronous memory device and methods of operating and testing same |
| 01/11/2005 | US6842388 Semiconductor memory device with bit line precharge voltage generating circuit |
| 01/11/2005 | US6842387 Method and circuit for repairing nonvolatile ferroelectric memory device |
| 01/11/2005 | US6842386 Semiconductor integrated circuit, and a data storing method thereof |
| 01/11/2005 | US6842385 Automatic reference voltage regulation in a memory device |
| 01/11/2005 | US6842381 Method of marginal erasure for the testing of flash memories |
| 01/11/2005 | US6842371 Permanent master block lock in a memory device |
| 01/11/2005 | US6842367 Thin film magnetic memory device provided with program element |
| 01/11/2005 | US6842065 Electrical fuse programming control circuit |