| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 02/09/2005 | CN1577626A Memory module integrated clock supply chip, module containing chip and operation of module |
| 02/09/2005 | CN1577605A Integrated circuit memory devices including programmed memory cells and programmable and erasable memory cells |
| 02/09/2005 | CN1188865C Method and device of using compressed data in far-end box to initialize integrated circuit |
| 02/08/2005 | US6854080 Memory LSI failure analysis apparatus and analysis method thereof |
| 02/08/2005 | US6854079 Apparatus and method for reducing test resources in testing Rambus DRAMs |
| 02/08/2005 | US6854078 Multi-bit test circuit |
| 02/08/2005 | US6853938 Calibration of memory circuits |
| 02/08/2005 | US6853601 Device and method for repairing a memory array by storing each bit in multiple memory cells in the array |
| 02/08/2005 | US6853598 Non-volatile memory with test rows for disturb detection |
| 02/08/2005 | US6853596 Semiconductor memory enabling correct substitution of redundant cell array |
| 02/08/2005 | US6853595 Semiconductor memory device |
| 02/08/2005 | US6853592 Semiconductor memory device permitting control of internal power supply voltage in packaged state |
| 02/08/2005 | US6853591 Circuit and method for decreasing the required refresh rate of DRAM devices |
| 02/08/2005 | US6853317 Circuit and method for generating mode register set code |
| 02/08/2005 | US6853206 Method and probe card configuration for testing a plurality of integrated circuits in parallel |
| 02/08/2005 | US6853177 Semiconductor device with process monitor circuit and test method thereof |
| 02/08/2005 | US6853175 Apparatus and method for measuring electrical characteristics of a semiconductor element in a packaged semiconductor device |
| 02/08/2005 | US6853000 Test structure for determining a doping region of an electrode connection between a trench capacitor and a selection transistor in a memory cell array |
| 02/03/2005 | US20050028072 Encryption keys for multiple drive fault tolerance |
| 02/03/2005 | US20050028069 Memory system and controller for same |
| 02/03/2005 | US20050028068 Beacon to visually locate memory module |
| 02/03/2005 | US20050028067 Data with multiple sets of error correction codes |
| 02/03/2005 | US20050028063 Integration type input circuit and method of testing it |
| 02/03/2005 | US20050028062 Test method and apparatus for high-speed semiconductor memory devices |
| 02/03/2005 | US20050028058 Semiconductor circuit and method for testing, monitoring and application-near setting of a semiconductor circuit |
| 02/03/2005 | US20050028057 Systems and methods of partitioning data to facilitate error correction |
| 02/03/2005 | US20050028056 Systems and methods of routing data to facilitate error correction |
| 02/03/2005 | US20050028054 Memory with element redundancy |
| 02/03/2005 | US20050028053 Memory with element redundancy |
| 02/03/2005 | US20050028052 Memory with element redundancy |
| 02/03/2005 | US20050028041 Motherboard memory slot ribbon cable and apparatus |
| 02/03/2005 | US20050028040 Memory arrangement in a computer system |
| 02/03/2005 | US20050028039 Method and apparatus for coordinating dynamic memory deallocation with a redundant bit line steering mechanism |
| 02/03/2005 | US20050027922 Semiconductor memory device and method for stacking reference data |
| 02/03/2005 | US20050025277 Diagnostic method and apparatus for non-destructively observing latch data |
| 02/03/2005 | US20050024982 Memory with element redundancy |
| 02/03/2005 | US20050024981 Byte aligned redundancy for memory array |
| 02/03/2005 | US20050024977 Multiple power levels for a chip within a multi-chip semiconductor package |
| 02/03/2005 | US20050024976 Content addressable memory device |
| 02/03/2005 | US20050024974 Semiconductor memory device |
| 02/03/2005 | US20050024970 Device having a memory array storing each bit in multiple memory cells |
| 02/03/2005 | US20050024964 Device for margin testing a semiconductor memory by applying a stressing voltage simultaneously to complementary and true digit lines |
| 02/03/2005 | US20050024960 Electrical fuse control of memory slowdown |
| 02/03/2005 | US20050024959 Semiconductor memory device capable of relieving defective cell |
| 02/03/2005 | US20050024956 Column redundancy for digital multilevel nonvolatile memory |
| 02/03/2005 | US20050024942 Semiconductor memory device having a burst continuous read function |
| 02/03/2005 | US20050024912 System and method for providing a redundant memory array in a semiconductor memory integrated circuit |
| 02/03/2005 | US20050024097 Temperature sensor and method for detecting trip temperature of a temperature sensor |
| 02/03/2005 | US20050024058 Semi-conductor component test process and a system for testing semi-conductor components |
| 02/03/2005 | US20050023563 Semiconductor chip with fuse unit |
| 02/03/2005 | US20050023560 Memory module test system |
| 02/03/2005 | DE69333631T2 Halbleiterspeicheranordnung A semiconductor memory device |
| 02/03/2005 | DE10330042A1 Semiconductor component test system has two test units for separate digital functional and analogue quality test sequences |
| 02/03/2005 | DE10245536B4 Kalibrieren von Halbleitereinrichtungen mittels einer gemeinsamen Kalibrierreferenz Calibration of semiconductor devices by means of a joint calibration reference |
| 02/02/2005 | EP1261972A4 Apparatus for testing memories with redundant storage elements |
| 02/02/2005 | EP1224479B1 Built-in spare row and column replacement analysis system for embedded memories |
| 02/02/2005 | EP1185985A4 Method and integrated circuit for bit line soft programming (blisp) |
| 02/02/2005 | CN1574269A Method and device for analyzing fail bit maps of wafers |
| 02/02/2005 | CN1574267A Semi-conductor component testing process and system for testing semi-conductor components |
| 02/02/2005 | CN1574102A Method for testing a memory device |
| 02/02/2005 | CN1574101A Reducing memory failures in integrated circuits |
| 02/02/2005 | CN1574100A 半导体存储设备 The semiconductor memory device |
| 02/02/2005 | CN1574093A Device and method for pulse width control in a phase change memory device |
| 02/02/2005 | CN1574083A 半导体存储装置 The semiconductor memory device |
| 02/02/2005 | CN1573695A Memory rewind and reconstruction for hardware emulator |
| 02/02/2005 | CN1573681A Random number generator with ring oscillation circuit |
| 02/02/2005 | CN1187832C 半导体存储器件 The semiconductor memory device |
| 02/02/2005 | CN1187621C Measurer of high-speed memory bus |
| 02/01/2005 | US6851082 Concentrated parity technique for handling double failures and enabling storage of more than one parity block per stripe on a storage device of a storage array |
| 02/01/2005 | US6851081 Semiconductor memory device having ECC type error recovery circuit |
| 02/01/2005 | US6851078 Data transfer apparatus, memory device testing apparatus, data transfer method, and memory device testing method |
| 02/01/2005 | US6851076 Memory tester has memory sets configurable for use as error catch RAM, Tag RAM's, buffer memories and stimulus log RAM |
| 02/01/2005 | US6851017 Semiconductor memory |
| 02/01/2005 | US6850460 High performance programmable array local clock generator |
| 02/01/2005 | US6850454 Semiconductor memory device with reduced current consumption during standby state |
| 02/01/2005 | US6850450 Fuse box including make-link and redundant address decoder having the same, and method for repairing defective memory cell |
| 02/01/2005 | US6850437 Nonvolatile semiconductor memory device and method of retrieving faulty in the same |
| 02/01/2005 | US6850436 Non-volatile semiconductor device having a means to relieve a deficient erasure address |
| 02/01/2005 | US6850083 Burn in board having a remote current sensor |
| 02/01/2005 | US6850075 SRAM self-timed write stress test mode |
| 01/27/2005 | WO2005008677A1 Integrated circuit device comprising test circuit for measuring ac characteristic of built-in memory macro |
| 01/27/2005 | US20050022084 Built-in self-test arrangement for integrated circuit memory devices |
| 01/27/2005 | US20050022081 Test systems and methods with compensation techniques |
| 01/27/2005 | US20050022080 Systems and methods associated with test equipment |
| 01/27/2005 | US20050022079 Circuit and method for configuring CAM array margin test and operation |
| 01/27/2005 | US20050022078 Method and apparatus for memory redundancy and recovery from uncorrectable errors |
| 01/27/2005 | US20050022065 Apparatus and method for memory with bit swapping on the fly and testing |
| 01/27/2005 | US20050021901 Penalty free address decoding scheme |
| 01/27/2005 | US20050021303 Method for analyzing fail bit maps of wafers |
| 01/27/2005 | US20050021275 Method and system for test data capture and compression for electronic device analysis |
| 01/27/2005 | US20050021260 Use of I2C programmable clock generator to enable frequency variation under BMC control |
| 01/27/2005 | US20050018517 Fuse blowing interface for a memory chip |
| 01/27/2005 | US20050018511 Semiconductor memory device which selectively controls a local input/output line sense amplifier |
| 01/27/2005 | US20050018499 Apparatus for determining burn-in reliability from wafer level burn-in |
| 01/27/2005 | US20050018497 Memory device and method of storing fail addresses of a memory cell |
| 01/27/2005 | US20050018483 Nonvolatile semiconductor memory and its test method |
| 01/27/2005 | US20050018461 Semiconductor integrated circuit device, method of testing semiconductor integrated circuit device and method of manufacturing semiconductor integrated circuit device |
| 01/27/2005 | US20050017747 Semi-conductor component testing process and system for testing semi-conductor components |
| 01/27/2005 | US20050017234 Nanoscale wire-based sublithographic programmable logic arrays |
| 01/27/2005 | US20050017156 High-speed, precision, laser-based method and system for processing material of one or more targets within a field |