Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
02/2014
02/20/2014US20140053033 Programming error correction code into a solid state memory device with varying bits per cell
02/20/2014US20140053032 Memory test method, memory test device, and adapter thereof
02/20/2014US20140050039 Semiconductor memory devices
02/20/2014US20140050038 Memory device with bi-directional tracking of timing constraints
02/20/2014US20140050035 Semiconductor memory device and method of testing the same
02/20/2014US20140050034 Cas latency setting circuit and semiconductor memory apparatus including the same
02/20/2014US20140050004 Semiconductor device having hierarchically structured bit lines
02/20/2014US20140050003 Variable resistance nonvolatile memory device and driving method of variable resistance nonvolatile memory device
02/20/2014DE19882853B3 Verfahren und Steuereinrichtung zum automatischen Korrigieren von in einem Speichersubsystem erfassten Fehlern und Computersystem, das eine solche Steuereinrichtung aufweist A method and control device for automatically correcting the detected errors in a memory subsystem and computer system having such a control device
02/19/2014CN103597443A Storage device firmware and manufacturing software
02/19/2014CN103594123A Non-volatile memory and adjustment method thereof
02/19/2014CN103594122A Logic substitution method and circuit for realizing memory card interface testing
02/19/2014CN103594121A Memory test method, memory test device, and adapter thereof
02/19/2014CN103594120A Memorizer error correction method adopting reading to replace writing
02/18/2014US8656257 Nonvolatile memory controller with concatenated error correction codes
02/18/2014US8656256 Apparatus and method for multi-mode operation of a flash memory device
02/18/2014US8656254 Unidirectional error code transfer for both read and write data transmitted via bidirectional data link
02/18/2014US8656253 Storing portions of data in a dispersed storage network
02/18/2014US8656252 Memory controller and non-volatile storage device
02/18/2014US8656251 Simultaneous data transfer and error control to reduce latency and improve throughput to a host
02/18/2014US8656231 Method and apparatus for determining whether a page in a flash memory system is in an erased state
02/18/2014US8656230 Driving method of electronic device
02/18/2014US8656214 Dual ported replicated data cache
02/18/2014US8654603 Test operation for a low-power double-data-rate (LPDDR) nonvolatile memory device
02/18/2014US8654597 Defective memory cell address storage circuit and redundancy control circuit including the same
02/13/2014WO2014025919A1 Monolithic multi-channel adaptable stt-mram
02/13/2014US20140047290 Error generating apparatus for solid state drive tester
02/13/2014US20140047289 Failure detection apparatus for solid state drive tester
02/13/2014US20140047288 Storage interface apparatus for solid state drive tester
02/13/2014US20140047287 Solid state drive tester
02/13/2014US20140047286 Solid state drive tester
02/13/2014US20140047285 Memory manager
02/13/2014US20140047284 Combo static flop with full test
02/13/2014US20140043927 Method for optimizing refresh rate for dram
02/13/2014DE10221935B4 Verfahren zur Erkennung und Korrektur von Bitfehlern A method for detection and correction of bit errors
02/13/2014DE102005047377B4 Nichtflüchtiges Speicherbauelement und Verfahren zum Verifizieren von Daten A non-volatile memory device and method for verifying data
02/13/2014DE102005040226B4 Nichtflüchtiges Speicherbauelement und Testverfahren A non-volatile memory device and test method
02/12/2014CN103578568A Method and apparatus for testing performances of solid state disks
02/12/2014CN103578567A Triplication redundancy-based anti-radiation self-refreshing register
02/12/2014CN103578566A Memory storage apparatus and restoration method thereof
02/12/2014CN103578565A Calibration method and device of NAND Flash memory chip
02/12/2014CN103578564A Semiconductor apparatus
02/12/2014CN103578563A Fail address detector, semiconductor memory device and method of detecting fail address
02/12/2014CN103578562A Mechanisms for built-in self test and repair for memory devices
02/12/2014CN103578561A Flash memory as well as erasure verification method and erasure verification device for same
02/12/2014CN103576076A System and method for executing scan test
02/12/2014CN101763901B On-wafer self-test and self-repair method
02/11/2014USRE44764 Serially decoded digital device testing
02/11/2014US8650463 Solid state drive and method of controlling an error thereof
02/11/2014US8650462 Probabilistic error correction in multi-bit-per-cell flash memory
02/11/2014US8650461 Adaptive over-provisioning in memory systems
02/11/2014US8650460 Electronic apparatus, method of correcting detection data, and sensor unit
02/11/2014US8650447 Apparatus and methods for controlled error injection
02/11/2014US8650446 Management of a non-volatile memory based on test quality
02/11/2014US8649215 Data management in flash memory using probability of charge disturbances
02/06/2014WO2014022416A1 System and method to perform scan testing using a pulse latch with a blocking gate
02/06/2014US20140040687 Non-Volatile Memory (NVM) with Imminent Error Prediction
02/06/2014US20140040686 Testing method and semiconductor integrated circuit to which the same method is applied
02/06/2014US20140040685 Built-in-self-test (bist) organizational file generation
02/06/2014US20140036609 Testing retention mode of an sram array
02/06/2014DE10300781B4 Speicherbaustein, Testsystem und Verfahren zum Testen eines oder mehrerer Speicherbausteine Memory module test system and method for testing one or more memory devices
02/06/2014DE102004060644B4 Direktzugriffsspeicher, Speichersteuerung und Verfahren unter Verwendung von Vorladezeitgebern in einem Testmodus Random access memory, memory controller and method using Vorladezeitgebern in a test mode
02/06/2014DE10124923B4 Testverfahren zum Testen eines Datenspeichers und Datenspeicher mit integrierter Testdatenkompressionsschaltung Test method for testing a data memory and data storage with an integrated test data compression circuit
02/05/2014EP2693441A1 Memory architecture and associated serial direct access circuit
02/05/2014CN103559915A DRAM (Dynamic Random Access Memory) testing device and method for reducing address connection
02/05/2014CN103559914A Method for storing data with different lengths through ECC (error correction code) memory
02/05/2014CN103559908A Oscillation device, method of oscillation, and memory device
02/04/2014US8645799 Storage codes for data recovery
02/04/2014US8645798 Parallel Reed-Solomon RAID (RS-RAID) architecture, device, and method
02/04/2014US8645797 Injecting a data error into a writeback path to memory
02/04/2014US8645796 Dynamic pipeline cache error correction
02/04/2014US8645795 Nonvolatile semiconductor memory device
02/04/2014US8645791 Data cache controller, devices having the same, and method of operating the same
02/04/2014US8645776 Run-time testing of memory locations in a non-volatile memory
02/04/2014US8645775 Method and apparatus for the determination of a repetitive bit value pattern
02/04/2014US8645774 Expedited memory drive self test
02/04/2014US8645773 Estimating temporal degradation of non-volatile solid-state memory
02/04/2014US8645770 Systems and methods for proactively refreshing nonvolatile memory
02/04/2014US8644098 Dynamic random access memory address line test technique
02/04/2014US8644097 Memory device
01/2014
01/30/2014US20140032984 Memory module and a memory test system for testing the same
01/30/2014US20140032823 Memory block identified by group of logical block addresses, storage device with movable sectors, and methods
01/30/2014US20140029364 Bit error testing and training in double data rate (ddr) memory system
01/30/2014US20140029363 Fail address detector,semiconductor memory device including the same and method of detecting fail address
01/30/2014US20140029362 Mechanisms for bulit-in self test and repair for memory devices
01/30/2014US20140029355 Memory device and method of determining read voltage of memory device
01/29/2014EP2690629A2 Methods and systems for adjusting nvm cell bias conditions for program/erase operations to reduce performance degradation
01/29/2014EP2690628A1 Methods and systems for adjusting NVM cell bias conditions based upon operating temperature to reduce performance degradation
01/29/2014CN103547935A 夹具 Fixture
01/29/2014CN103544995A Bad track repairing method and bad track repairing device
01/29/2014CN103544994A Flash memory controllers and error detection methods
01/29/2014CN102163459B Burning device using universal serial bus (USB) interface
01/29/2014CN101615421B Multichannel mixed density memory storing device and control method thereof
01/28/2014US8640116 Loader module, and method for loading program code into a memory
01/28/2014US8640007 Method and apparatus for transmitting diagnostic data for a storage device
01/28/2014US8640006 Preemptive memory repair based on multi-symbol, multi-scrub cycle analysis
01/28/2014US8640005 Method and apparatus for using cache memory in a system that supports a low power state
01/28/2014US8639993 Encoding data to enable it to be stored in a storage block that includes at least one storage failure
01/28/2014US8639855 Information collection and storage for single core chips to 'N core chips
01/28/2014US8638286 Redundancy shift register circuit for driver circuit in active matrix type liquid crystal display device
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