Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
10/2013
10/24/2013US20130279269 Semiconductor device and semiconductor system including the same
10/24/2013US20130279254 Semiconductor memory storage apparatus having charge storage layer and control gate
10/24/2013DE102004050104B4 Halbleiter-Bauelement, sowie Verfahren zum Auslesen von Testdaten A semiconductor device, and method of reading test data
10/23/2013EP2652619A2 Memory device on the fly crc mode
10/23/2013CN103366831A Detection method for memory
10/23/2013CN103366830A Testing device of memory card
10/23/2013CN103366829A Stepper motor power-outage displacement recovery device and method
10/23/2013CN103366828A Storage device and detection method thereof
10/23/2013CN103366827A Storage device and method for testing storage device through testing machine
10/23/2013CN103366826A NAND flash memory chip and chip programming method in check board test of NAND flash memory chip
10/23/2013CN103366825A NAND flash memory chip and chip programming method for check board test of NAND flash memory chip
10/23/2013CN103366824A Non-volatile memory reading speed test circuit
10/23/2013CN103366823A Testing circuit and method for TCAM (Ternary Content Addressable Memory)
10/23/2013CN101501784B System and method for correcting errors in non-volatile memory using product codes
10/22/2013US8566691 Analyzer
10/22/2013US8566674 Using a phase change memory as a high volume memory
10/22/2013US8566673 Method for improving performance in RAID systems
10/22/2013US8566672 Selective checkbit modification for error correction
10/22/2013US8566671 Configurable accelerated post-write read to manage errors
10/22/2013US8566670 RAM memory device selectively protectable with ECC
10/22/2013US8566669 Memory system and method for generating and transferring parity information
10/22/2013US8566570 Distributed multi-core memory initialization
10/17/2013US20130275823 Programmable logic circuit using three-dimensional stacking techniques
10/17/2013US20130275822 At Speed Testing of High Performance Memories with a Multi-Port BIS Engine
10/17/2013US20130275821 Read only memory (rom) with redundancy
10/17/2013US20130272080 Method and apparatus for bit cell repair
10/16/2013CN203242352U Elastic clamp box for memory-chip automatic insertion and extraction test device
10/16/2013CN103354101A Decoding apparatus of LDPC (low density parity check) code for flash memory error correction
10/16/2013CN101872649B Test method of one-time programmable resistance memory
10/16/2013CN101783184B Double data rate 2 (DDR2) memory failure injecting tool and injecting method based on field programmable gate array (FPGA)
10/16/2013CN101131876B Error correction circuit and method, and semiconductor memory device including the circuit
10/15/2013US8560926 Data writing method, memory controller and memory storage apparatus
10/15/2013US8560925 System and method for handling bad bit errors
10/15/2013US8560924 Register file soft error recovery
10/15/2013US8560923 Semiconductor memory device
10/15/2013US8560922 Bad block management for flash memory
10/15/2013US8560918 Method and apparatus for dynamically selecting an error correction code to be applied to data in a communication system
10/15/2013US8560902 Writing scheme for phase change material-content addressable memory
10/15/2013US8560900 Adjusting receiver parameters without known data
10/10/2013US20130268825 Secondary memory to store a varying amount of overhead information
10/10/2013US20130268815 Method and system for determining support for a memory card
10/10/2013DE10235454B4 Integrierter Speicher und Verfahren zur Funktionsüberprüfung eines integrierten Speichers Integrated memory and method for functional verification of an embedded memory
10/10/2013DE102004023407B4 Testvorrichtung und Verfahren zum Testen eines eingebetteten Speicherkerns sowie zugehöriger Halbleiterchip A test device and method for testing of an embedded memory core and associated semiconductor chip
10/10/2013DE102004010838B4 Verfahren zum Bereitstellen von Adressinformation über ausgefallene Feldelemente und das Verfahren verwendende Schaltung A method for providing address information about failed field elements and the process circuit used
10/09/2013EP2647011A2 Apparatus, system, and method for matching patterns with an ultra fast check engine
10/09/2013EP2647010A2 Apparatus, system, and method for matching patterns with an ultra fast check engine based on flash cells
10/09/2013CN103345945A Memory testing device with frequency testing function, as well as memory testing method
10/09/2013CN103345944A Storage device and method for testing storage device through test machine
10/09/2013CN103345943A Multi-bit upset detection method based on memorizer without word line segmentation
10/09/2013CN103345942A Method and device for analyzing errors of operation types of storer
10/08/2013US8555144 Memory system, memory system controller, and a data processing method in a host apparatus
10/08/2013US8555142 Verifying integrity of data stored in a dispersed storage memory
10/08/2013US8555141 Flash memory organization
10/08/2013US8555130 Storing encoded data slices in a dispersed storage unit
10/08/2013US8555127 Self-timed error correcting code evaluation system and method
10/08/2013US8555119 Test structure for characterizing multi-port static random access memory and register file arrays
10/08/2013US8554985 Memory block identified by group of logical block addresses, storage device with movable sectors, and methods
10/08/2013US8553486 Semiconductor memory device correcting fuse data and method of operating the same
10/03/2013WO2013149235A1 Ferroelectric random access memory (fram) layout apparatus and method
10/03/2013WO2013148544A1 Memory with redundant sense amplifier
10/03/2013WO2013148357A1 Trimmable reference generator for sense amplifier
10/03/2013WO2013147938A1 Selected word line dependent programming voltage
10/03/2013WO2013147913A1 Delay-compensated error indication signal
10/03/2013WO2013147890A1 Error correcting code scheme utilizing reserved space
10/03/2013WO2013147888A1 Memories utilizing hybrid error correcting code techniques
10/03/2013WO2013147844A1 Built-in self-test for stacked memory architecture
10/03/2013WO2013147841A1 Generic address scrambler for memory circuit test engine
10/03/2013WO2013147840A1 On chip redundancy repair for memory devices
10/03/2013WO2013147811A1 Method and system to obtain state confidence data using multistrobe read of a non-volatile memory
10/03/2013WO2013147800A1 Chunk redundancy architecture for memory
10/03/2013WO2013147797A1 Method and apparatus for treatment of state confidence data retrieved from a non-volatile memory array
10/03/2013WO2013147733A1 Timing optimization for memory devices employing error detection coded transactions
10/03/2013WO2013143578A1 Non-volatile memory assemblies
10/03/2013US20130262960 Solid-state mass storage device and method for failure anticipation
10/03/2013US20130262942 Flash memory lifetime evaluation method
10/03/2013US20130262802 Managing defective areas of memory
10/02/2013CN103337259A SRAM (Static Random Access Memory) mismatched transistor inspection method
10/02/2013CN103337258A Storage testing method capable of covering static and dynamic faults
10/02/2013CN102332311B FPGA (Field Programmable Gate Array)-based single event effect test method for NAND FLASH device
10/02/2013CN102332310B FPGA (Field Programmable Gate Array)-based single event effect test system for NAND FLASH device
10/02/2013CN102034551B Efuse devices, correction methods thereof, and methods for operating efuse devices
10/02/2013CN102024497B Method for storing data and storage device
10/01/2013US8549384 Method and apparatus for determining, based on an error correction code, one or more locations to store data in a flash memory
10/01/2013US8549383 Cache tag array with hard error proofing
10/01/2013US8549381 Storage subsystem
10/01/2013US8549380 Non-volatile memory error mitigation
10/01/2013US8549378 RAIM system using decoding of virtual ECC
10/01/2013US8549367 Method and system for accelerating memory randomization
10/01/2013US8549366 Memory refreshing circuit and method for memory refresh
09/2013
09/26/2013WO2013141955A2 Wash-off resistant epoxy and use thereof
09/26/2013WO2013112336A3 Adaptive programming and erasure schemes for analog memory cells
09/26/2013US20130254607 Probeless testing of pad buffers on wafer
09/26/2013US20130254513 Redundant memory array for replacing memory sections of main memory
09/26/2013US20130250709 Testing system and testing method thereof
09/26/2013US20130250708 Memory element and method for determining the data state of a memory element
09/26/2013US20130250707 Replacing defective memory blocks in response to external addresses
09/26/2013US20130250706 Memory module
09/25/2013CN103325426A Seamless acquisition method based on DDR2SDRAM array segmented storage
09/25/2013CN103325425A 存储器控制器 The memory controller
09/25/2013CN103325424A Method for evaluating lifetime of flash memory
1 ... 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 ... 306