| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 07/24/2013 | CN101395674B Method and apparatus for testing data steering logic for data storage |
| 07/23/2013 | US8495471 Solid-state storage system with parallel access of multiple flash/PCM devices |
| 07/23/2013 | US8495470 Efficient rewrite technique for tape drives |
| 07/23/2013 | US8495468 Data storage apparatus and data writing/reading method |
| 07/23/2013 | US8495467 Switchable on-die memory error correcting engine |
| 07/23/2013 | US8495466 Adjusting data dispersal in a dispersed storage network |
| 07/23/2013 | US8495465 Error correction coding over multiple memory pages |
| 07/23/2013 | US8495464 Reliability support in memory systems without error correcting code support |
| 07/23/2013 | US8495463 Memory controlling apparatus and method |
| 07/23/2013 | US8495442 Circuits, architectures, apparatuses, systems, algorithms, software and firmware for using reserved cells to indicate defect positions |
| 07/23/2013 | US8495441 Method for adjusting memory signal phase |
| 07/23/2013 | US8495440 Fully programmable parallel PRBS generator |
| 07/23/2013 | US8495438 Technique for memory imprint reliability improvement |
| 07/23/2013 | US8495437 Semiconductor memory device |
| 07/23/2013 | US8495436 System and method for memory testing in electronic circuits |
| 07/23/2013 | US8495435 Dynamic physical memory replacement through address swapping |
| 07/18/2013 | US20130182518 Memory cell of semiconductor memory device and method for driving the same |
| 07/18/2013 | US20130182517 Fail address storage circuit, redundancy control circuit, method for storing fail address and method for controlling redundancy |
| 07/18/2013 | US20130182489 Replacement of a faulty memory cell with a spare cell for a memory circuit |
| 07/18/2013 | DE19823583B4 Kombiniertes Halbleiterspeicher- und -logikbauelement sowie Speichertest-Steuerschaltung und Speichertestverfahren hierfür Combined semiconductor memory and -logikbauelement and memory test control circuit and memory test method therefor |
| 07/17/2013 | EP2189986B1 Delay adjustment device, semiconductor device and delay adjustment method |
| 07/17/2013 | CN103208314A Internal memory test method of embedded system and embedded system |
| 07/17/2013 | CN103208313A Detection method and detection system |
| 07/17/2013 | CN103208312A Method for improving storage accuracy of automotive electronic control unit mileage data |
| 07/17/2013 | CN101859773B Circuit and method for improving radiation reinforcement degree of memory element |
| 07/16/2013 | US8489966 Solid-state mass storage device and method for failure anticipation |
| 07/16/2013 | US8489965 Long latency protocol for hard disk controller interface |
| 07/16/2013 | US8489946 Managing logically bad blocks in storage devices |
| 07/16/2013 | US8489945 Method and system for introducing physical damage into an integrated circuit device for verifying testing program and its results |
| 07/16/2013 | US8489944 Disabling outbound drivers for a last memory buffer on a memory channel |
| 07/16/2013 | US8489943 Protocol sequence generator |
| 07/16/2013 | US8489942 Memory management method, and memory controller and memory storage device using the same |
| 07/16/2013 | US8489936 High reliability memory module with a fault tolerant address and command bus |
| 07/16/2013 | US8489558 Distributed file system logging |
| 07/16/2013 | US8489345 Technique for determining performance characteristics of electronic devices and systems |
| 07/16/2013 | US8488686 Communication channel calibration with nonvolatile parameter store for recovery |
| 07/16/2013 | US8488400 Multi-port memory device |
| 07/11/2013 | US20130179740 Memory devices and methods for managing error regions |
| 07/11/2013 | US20130176772 Electrical Screening of Static Random Access Memories at Varying Locations in a Large-Scale Integrated Circuit |
| 07/11/2013 | US20130176768 Replacement of a faulty memory cell with a spare cell for a memory circuit |
| 07/11/2013 | DE10345977B4 Verfahren zum Testen von zu testenden Schaltungseinheiten mittels Mehrheitsentscheidungen und Testvorrichtung zur Durchführung des Verfahrens A method of testing of circuit units to be tested by means of majority decisions and test device for carrying out the method |
| 07/11/2013 | DE10145727B4 Verfahren und Vorrichtung zum Verringern des Stromverbrauchs einer elektronischen Schaltung Method and apparatus for reducing the power consumption of an electronic circuit |
| 07/10/2013 | CN203055467U Electronic component tray assembly |
| 07/10/2013 | CN103198870A Repairing method of non-uniformly distributed redundances in DRAM (Dynamic Random Access Memory) |
| 07/10/2013 | CN103198869A Error correction codec for NANA flash memory of space CCD image memory and error correction method |
| 07/10/2013 | CN103198868A Fault simulation system and fault analysis method for single event upset |
| 07/10/2013 | CN101752008B Method for testing reliability of solid-state storage media |
| 07/10/2013 | CN101625902B Method, system and device for acquiring service life of semiconductor storage medium |
| 07/10/2013 | CN101611453B Independent link and bank selection |
| 07/09/2013 | US8484537 Systems and methods for data-path protection |
| 07/09/2013 | US8484536 Techniques for data storage, access, and maintenance |
| 07/09/2013 | US8484535 Error-floor mitigation of codes using write verification |
| 07/09/2013 | US8484534 MLC self-RAID flash data protection scheme |
| 07/09/2013 | US8484533 MLC self-RAID flash data protection scheme |
| 07/09/2013 | US8484522 Apparatus, system, and method for bad block remapping |
| 07/09/2013 | US8484521 Firmware monitoring of memory scrub coverage |
| 07/09/2013 | US8484520 Processor capable of determining ECC errors |
| 07/09/2013 | US8484519 Optimal programming levels for LDPC |
| 07/09/2013 | US8482973 Nonvolatile memory cell operating by increasing order in polycrystalline semiconductor material |
| 07/04/2013 | WO2013102230A1 Built in self-testing and repair device and method |
| 07/04/2013 | WO2013101363A1 Optimized threshold search in analog memory cells |
| 07/04/2013 | WO2013101196A1 Phase change memory with switch (pcms) write error detection |
| 07/04/2013 | WO2013101043A1 Dynamic window to improve nand memory endurance |
| 07/04/2013 | WO2013101006A1 Generic address scrambler for memory circuit test engine |
| 07/04/2013 | WO2013100983A1 Resilient register file circuit for dynamic variation tolerance and method of operating the same |
| 07/04/2013 | WO2013100939A1 Memory module architecture |
| 07/04/2013 | US20130173975 Method of testing flash memory |
| 07/04/2013 | US20130173974 Computer memory test structure |
| 07/04/2013 | US20130173973 Device |
| 07/04/2013 | US20130173972 System and method for solid state disk flash plane failure detection |
| 07/04/2013 | US20130173971 Boundary scan chain for stacked memory |
| 07/04/2013 | US20130173970 Memory device with background built-in self-testing and background built-in self-repair |
| 07/04/2013 | US20130170308 Semiconductor memory test method and semiconductor memory |
| 07/04/2013 | US20130170307 Electronic device and method for testing endurance of memory |
| 07/04/2013 | US20130170305 Parallel test circuit and method of semiconductor memory apparatus |
| 07/04/2013 | US20130170301 Wordline-to-Wordline Stress Configuration |
| 07/04/2013 | DE102012024886A1 Boundary Scan-Kette für gestapelten Speicher Boundary Scan Chain for stacked memory |
| 07/03/2013 | EP2610874A1 Optimized read threshold search for reading of analog memory cells |
| 07/03/2013 | CN203038674U Memory chip testing machine |
| 07/03/2013 | CN103187104A Error correction method of memory |
| 07/03/2013 | CN103187103A Memory test method |
| 07/03/2013 | CN103187102A Semiconductor memory test method and semiconductor memory |
| 07/03/2013 | CN103187101A Compressed data output method for DRAM repair test |
| 07/03/2013 | CN103187100A Quantifying the read and write margins of memory bit cells |
| 07/03/2013 | CN103187099A Electronic device and method capable of shortening hard disk durability test time |
| 07/03/2013 | CN103187098A Decoupling capacitance calibration devices and methods for DRAM |
| 07/03/2013 | CN101911210B Multiply apparatus for semiconductor test pattern signal |
| 07/03/2013 | CN101809673B Nonvolatile memory with self recovery |
| 07/03/2013 | CN101770816B Resistive random access memory (RRAM) unit test system and switcher thereof |
| 07/02/2013 | US8479078 Distributed storage network for modification of a data object |
| 07/02/2013 | US8479063 Failure analyzing device and failure analyzing method |
| 07/02/2013 | US8479062 Program disturb error logging and correction for flash memory |
| 07/02/2013 | US8479061 Solid state memory cartridge with wear indication |
| 07/02/2013 | US8479060 Memory with self-test function and method for testing the same |
| 07/02/2013 | US8477547 Semiconductor memory device and method of operating the same |
| 06/27/2013 | WO2013096505A1 Methodology for recovering failed bit cells in an integrated circuit memory |
| 06/27/2013 | WO2013095673A1 Self-repair logic for stacked memory architecture |
| 06/27/2013 | US20130166973 Storage-medium diagnosis device, storage-medium diagnosis method |
| 06/27/2013 | US20130163357 Quantifying the Read and Write Margins of Memory Bit Cells |
| 06/27/2013 | US20130163356 Semiconductor integrated circuit and method of testing semiconductor integrated circuit |