Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
11/2013
11/20/2013EP2202753B1 Information processing system with longevity evaluation
11/20/2013CN103403809A A redundancy memory storage system and a method for controlling a redundancy memory storage system
11/20/2013CN103400602A Automatic hard disk bad track repairing method and equipment
11/20/2013CN102280142B Memory detection method
11/19/2013US8589769 System, method and storage medium for providing fault detection and correction in a memory subsystem
11/19/2013US8589768 Memory system having multiple channels and write control method including determination of error correction channel in memory system
11/19/2013US8589767 Systems, devices and methods using redundant error correction code bit storage
11/19/2013US8589766 Codeword remapping schemes for non-volatile memories
11/19/2013US8589765 Memory read-out
11/19/2013US8589763 Cache memory system
11/19/2013US8589762 Adaptive multi-bit error correction in endurance limited memories
11/19/2013US8589761 Apparatus and methods for providing data integrity
11/19/2013US8589760 Defect scan and manufacture test
11/19/2013US8589759 RAM single event upset (SEU) method to correct errors
11/19/2013US8589743 Double data rate signal testing assistant device
11/19/2013US8588017 Memory circuits, systems, and modules for performing DRAM refresh operations and methods of operating the same
11/19/2013US8587978 Nonvolatile memory apparatus, repair circuit for the same, and method for reading code addressable memory data
11/19/2013DE202013009597U1 Vorrichtung zum Ersetzen einer fehlerhaften Speicherzelle durch eine freie Zelle für eine Speicherschaltung A device for replacing a defective memory cell by a free cell for a memory circuit
11/14/2013WO2013167608A1 Method and device for transmitting a message
11/14/2013US20130305079 Memory Component that Samples Command/Address Signals in Response to Both Edges of a Clock Signal
11/14/2013US20130301369 Mechanisms for built-in self repair of memory devices using failed bit maps and obvious repairs
11/14/2013US20130301335 Architecture, system and method for testing resistive type memory
11/14/2013DE19956550B4 Trimmschaltung für systemintegrierte Schaltung Trimming circuit for system integrated circuit
11/14/2013DE102013007692A1 Verfahren und Vorrichtung zur Korrektur ternär gespeicherter binärer Daten Method and apparatus for correcting ternary stored binary data
11/14/2013DE102004044721B4 Selbsttest für die Phasenlage des Datenleseclocksignals DQS Self-test for the phase of the data read clock signal DQS
11/14/2013DE10066260B4 Halbleiter-Speicheranordnung, Leiterplatte, auf welcher eine Halbleiter-Speicheranordnung montiert ist, und Verfahren zum Testen der Zwischenverbindung zwischen einer Halbleiter-Speicheranordnung und einer Leiterplatte A semiconductor memory device, circuit board, on which a semiconductor memory device is mounted, and method for testing the interconnection between a semiconductor memory device and a printed circuit board
11/13/2013EP2661750A1 A redundancy memory storage system and a method for controlling a redundancy memory storage system
11/13/2013CN103390432A Architecture, system and method for testing resistive type memory
11/13/2013CN103390431A Method and device for correction of ternary stored binary data
11/13/2013CN103390430A Memory built-in self-repair system and method based on Hash table
11/13/2013CN103390429A On-line hard disk detection method and server
11/13/2013CN101944386B Control circuit and storage system and method for identifying error data in flash memory
11/13/2013CN101714398B High performance pulsed storage circuit
11/13/2013CN101471141B Methods for performing fail test, block management, erasing and programming in a nonvolatile memory device
11/12/2013US8583992 SAS-based semiconductor storage device memory disk unit
11/12/2013US8583990 Error correction in a storage element array
11/12/2013US8583989 Fibre channel input/output data routing system and method
11/12/2013US8583988 Fibre channel input/output data routing system and method
11/12/2013US8583986 Solid-state memory with error correction coding
11/12/2013US8583972 Method of controlling a semiconductor storage device
11/12/2013US8583971 Error detection in FIFO queues using signature bits
11/12/2013US8582378 Threshold voltage measurement device
11/12/2013US8582377 Redundant memory array for replacing memory sections of main memory
11/12/2013US8582367 Semiconductor memory device and method of operating the same
11/07/2013WO2013166482A1 Method and apparatus for testing a resistive memory element
11/07/2013WO2013166200A1 Zero-one balance management in a solid-state disk controller
11/07/2013WO2013165774A1 Column redundancy circuitry for non-volatile memory
11/07/2013WO2013165387A1 Packaged memory dies that share a chip select line
11/07/2013US20130297987 Method and Apparatus for Reading NAND Flash Memory
11/07/2013US20130294186 Phase-locked loop and integrated circuit chip including the same, and test system including the integrated circuit chip
11/07/2013US20130294184 Self-repair logic for stacked memory architecture
11/07/2013US20130294183 Electrical fuse rupture circuit
11/07/2013US20130294175 Nonvolatile semiconductor device and method for testing the same
11/07/2013US20130294150 Method and apparatus for testing a resistive memory element
11/07/2013US20130294143 Built-In Self Test for One-Time-Programmable Memory
11/06/2013EP2659490A2 Method and system for controlling loss of reliability of non-volatile memory
11/06/2013CN203276863U Register set circuit, and apparatus and system for error detection in memory cell
11/06/2013CN103383864A Serial detection method of RAM production defects in integrated circuit
11/06/2013CN102347081B Method for calibrating phase of DQS (bidirectional data strobe) delay for DDR (double data rate) controller and apparatus thereof
11/06/2013CN102201265B Detection of hard-disc defect regions using soft decisions
11/06/2013CN101937724B Method for performing copy back operations and flash storage device
11/06/2013CN101794623B Error correction device of storage device and method thereof
11/06/2013CN101755307B Refresh of non-volatile memory cells based on fatigue conditions
11/06/2013CN101533675B Scanning and management method for flash memory medium
11/06/2013CN101458954B Memory system capable of storing multi-bit data and its read method
11/06/2013CN101002283B Semiconductor storage device and redundancy control method for semiconductor storage device
11/05/2013US8578246 Data encoding in solid-state storage devices
11/05/2013US8578245 Data reading method, memory storage apparatus, and controller thereof
11/05/2013US8578244 Programming error correction code into a solid state memory device with varying bits per cell
11/05/2013US8578242 Data storage device employing seed array for data path protection
11/05/2013US8578223 Method and apparatus of managing retransmissions in a wireless communication network
11/05/2013US8578179 Safe command execution and error recovery for storage devices
11/05/2013US8576648 Method of testing data retention of a non-volatile memory cell having a floating gate
11/05/2013US8576647 Semiconductor device
10/2013
10/31/2013US20130290798 Systems and Methods for Short Media Defect Detection Using Non-Binary Coded Information
10/31/2013US20130290797 Non-volatile memory (nvm) reset sequence with built-in read check
10/31/2013US20130286759 Method of selecting anti-fuses and method of monitoring anti-fuses
10/31/2013US20130286758 Redundancy control circuit and memory device including the same
10/31/2013US20130286757 Semiconductor device and driving method thereof
10/31/2013US20130286745 Method and apparatus for reading data from non-volatile memory
10/31/2013US20130286728 Nonvolatile memory cell operating by increasing order in polycrystalline semiconductor material
10/31/2013DE10246790B4 Integrierter Speicher Built-in Memory
10/30/2013CN1905077B System and method for testing device unit of phase change storage
10/30/2013CN103377713A Semiconductor device and semiconductor system including the same
10/30/2013CN103377712A Power up detecting system
10/30/2013CN103377707A Erasing a non-volatile memory (nvm) system having error correction code (ecc)
10/29/2013US8572466 Apparatuses, systems, devices, and methods of replacing at least partially non-functional portions of memory
10/29/2013US8572464 Recording and/or reproducing method, recording and/or reproducing apparatus, and computer readable recording medium storing program for performing the method
10/29/2013US8572463 Quasi-cyclic LDPC encoding and decoding for non-integer multiples of circulant size
10/29/2013US8572457 Outer code protection for solid state memory devices
10/29/2013US8572445 Non-volatile memory (NVM) with imminent error prediction
10/29/2013US8572444 Memory apparatus and testing method thereof
10/29/2013US8572443 System, method, and computer program product for determining a retention behavior for at least one block of a memory device having finite endurance and/or retention
10/29/2013US8570821 Semiconductor memory device and method for repairing the same
10/24/2013WO2013112766A3 Method and device for estimating damage to a magnetic tunnel junction (mtj) element
10/24/2013US20130283129 Solid-state mass storage device and method for failure anticipation
10/24/2013US20130283110 Controller to detect malfunctioning address of memory device
10/24/2013US20130279280 Stacked memory device with redundant resources to correct defects
10/24/2013US20130279278 Memory Component with Terminated and Unterminated Signaling Inputs
10/24/2013US20130279272 Semiconductor device having fuse circuit
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