Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
06/2014
06/24/2014US8762806 Decoding circuit and encoding circuit
06/24/2014US8762802 Code checking method for a memory of a printed circuit board
06/24/2014US8762801 Method and system for detecting and repairing defective memory cells without reporting a defective memory cell
06/24/2014US8762800 Systems and methods for handling immediate data errors in flash memory
06/24/2014US8762799 Method for checking the functional ability of a memory element
06/24/2014US8762798 Dynamic LDPC code rate solution
06/24/2014US8762638 Remote copy system and remote copy control method
06/24/2014US8762626 Data modification based on matching bit patterns
06/24/2014US8760944 Memory component that samples command/address signals in response to both edges of a clock signal
06/24/2014US8760901 Semiconductor device having a control chip stacked with a controlled chip
06/19/2014WO2014092966A1 System and method to update read voltages in a non-volatile memory in response to tracking data
06/19/2014US20140173369 Classifying flash devices using ecc
06/19/2014US20140173346 Validating operation of system-on-chip controller for storage device using programmable state machine
06/19/2014US20140169113 Enhancing Memory Yield Through Memory Subsystem Repair
06/19/2014US20140169092 Semiconductor memory device
06/19/2014US20140169091 Memory controller, storage device, and memory control method
06/18/2014CN103871481A Logic controller for nonvolatile memory
06/18/2014CN103871480A Memory perparing method, and memory controller and memory storage apparatus using the same
06/18/2014CN103871479A Programmable Built In Self Test (pBIST) system
06/18/2014CN103871478A Programmable Built In Self Test (pBIST) system
06/18/2014CN103871477A Programmable Built In Self Test (pBIST) system
06/18/2014CN103871476A Programmable Built In Self Test (pBIST) system
06/18/2014CN103871450A Semiconductor memory device and system having redundancy cells
06/18/2014CN102403043B Bit error rate test circuit and system and method for testing jitter tolerance
06/18/2014CN102394113B Dynamic LDPC error correction code method for flash memory
06/18/2014CN101853692B Controller with flash memory test function, and storage system and test method thereof
06/18/2014CN101253576B Apparatus and method for repairing a semiconductor memory
06/17/2014US8756480 Prioritized deleting of slices stored in a dispersed storage network
06/17/2014US8756465 Test module and a test method for reading a number of fails for a device under test (DUT)
06/17/2014US8756464 Flash memory device and flash memory programming method equalizing wear-level
06/17/2014US8756366 Method for operating non-volatile memory and data storage system using the same
06/17/2014US8755215 Resistive memory device
06/17/2014US8754656 High speed test circuit and method
06/17/2014US8752396 Component identification system and method
06/12/2014WO2014089312A1 Setting a default read signal based on error correction
06/12/2014WO2014088090A1 Semiconductor device
06/12/2014WO2014062554A4 Apparatus and method for repairing resistive memories and increasing overall read sensitivity of sense amplifiers
06/12/2014US20140165018 Semiconductor device, adjustment method thereof and data processing system
06/12/2014US20140164871 Dram error detection, evaluation, and correction
06/12/2014US20140164857 Testing Disk Drives Shared by Multiple Processors in a Supercomputer Complex
06/12/2014US20140164856 pBIST ENGINE WITH REDUCED SRAM TESTING BUS WIDTH
06/12/2014US20140164855 pBIST READ ONLY MEMORY IMAGE COMPRESSION
06/12/2014US20140164854 pBIST ARCHITECTURE WITH MULTIPLE ASYNCHRONOUS SUB CHIPS OPERATING IN DIFFERRING VOLTAGE DOMAINS
06/12/2014US20140164853 Memory operation of paired memory devices
06/12/2014US20140164820 Managing errors in a dram by weak cell encoding
06/12/2014US20140164726 System-on-chip having special function register and operating method thereof
06/12/2014US20140160845 Setting a default read signal based on error correction
06/12/2014US20140160844 Memory repairing method, and memory controller and memory storage apparatus using the same
06/11/2014EP2740124A1 Memory die self-disable if programmable element is not trusted
06/11/2014CN103854705A Method and system for providing smart memory architecture
06/11/2014CN103854704A Automatic detection method and automatic detection device of flash memory bad block
06/11/2014CN103854703A Apparatus to be detected, detector, and method for using the detector to the apparatus to be detected
06/11/2014CN103854702A Storage media and floating detection method
06/11/2014CN102782765B Repairable IO in an integrated circuit
06/11/2014CN102208213B Error correction mechanisms for flash memories
06/11/2014CN101842843B MRAM testing
06/11/2014CN101714411B Secure memory interface
06/11/2014CN101625903B Monitoring memory
06/10/2014US8751906 Systems and methods for operating on a storage device using a life-cycle dependent coding scheme
06/10/2014US8751905 Memory with on-chip error correction
06/10/2014US8751904 Controlling methods and controllers utilized in flash memory device for referring to data compression result to adjust ECC protection capability
06/10/2014US8751903 Methods and systems for monitoring write operations of non-volatile memory
06/10/2014US8751902 Methods and apparatus for encoding LDPC codes
06/10/2014US8751901 Nonvolatile semiconductor memory system configured to control data transfer
06/10/2014US8751900 Storage device having a non-volatile memory device and copy-back method thereof
06/10/2014US8751850 Optimized synchronous data reception mechanism
06/10/2014US8750061 Memory system, memory test system and method of testing memory system and memory test system
06/10/2014US8750042 Combined simultaneous sensing of multiple wordlines in a post-write read (PWR) and detection of NAND failures
06/10/2014US8750031 Test structures, methods of manufacturing thereof, test methods, and MRAM arrays
06/05/2014WO2014085257A1 Adaption of memory operation parameters according to predicted variations in cell dimension
06/05/2014WO2014084917A1 Row hammer monitoring based on stored row hammer threshold value
06/05/2014WO2014084855A1 Memory controllers to form symbols based on bursts
06/05/2014WO2014082438A1 Addressable test circuit for testing transistor key parameters, and test method thereof
06/05/2014US20140157068 Programming nonvolatile memory based on statistical analysis of charge level distributions of memory cells
06/05/2014US20140157066 Methods and apparatuses for memory testing with data compression
06/05/2014US20140157065 Method and system for providing a smart memory architecture
06/05/2014US20140157053 Memory subsystem data bus stress testing
06/05/2014US20140153332 Determining soft data from a hard read
06/05/2014DE102013112900A1 Verfahren und System zum Bereitstellen einer intelligenten Speicherarchitektur A method and system for providing an intelligent memory architecture
06/04/2014EP2738771A1 An apparatus and a method for memory testing by a programmable circuit in a safety critical system
06/04/2014EP2737490A1 System and method for testing fuse blow reliability for integrated circuits
06/04/2014EP2737484A1 Non-volatile memory saving cell information in a non-volatile memory array
06/04/2014CN103843069A Memory refresh methods and apparatuses
06/04/2014CN103843065A Improving sram cell writability
06/04/2014CN103839596A Optimal method for correcting embedded memory
06/04/2014CN103839595A Apparatus and method for correcting errors in data accessed from a memory device
06/04/2014CN103839594A Solid-state storage device and combining encoding and decoding method thereof
06/04/2014CN103839593A Flash interface error injector, injection method and system
06/04/2014CN103839592A Built-in self-test method and device for embedded-type flash memory
06/04/2014CN103839591A Automatic fault detection and fault-tolerant circuit of memory as well as control method
06/04/2014CN103839590A Device and method for measuring timing sequence parameter of storage and storage chip
06/04/2014CN103839589A Bit failure detection method
06/04/2014CN102194527B Semiconductor memory device
06/04/2014CN101996689B Memory errors processing method
06/04/2014CN101960532B Systems, methods, and apparatuses to save memory self-refresh power
06/04/2014CN101763902B Method and device thereof for measuring storage device
06/04/2014CN101714397B Correction of single event upset error within sequential storage circuitry of an integrated circuit
06/03/2014US8745466 Detecting data-write errors
06/03/2014US8745465 Detecting a burst error in the frames of a block of data bits
06/03/2014US8745464 Rank-specific cyclic redundancy check
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