Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
06/2005
06/09/2005US20050122800 Semiconductor integrated circuit device
06/09/2005US20050122799 Semiconductor integrated circuit provided with semiconductor memory circuit having redundancy function and method for transferring address data
06/09/2005US20050122774 Thin film magnetic memory device having redundant configuration
06/09/2005US20050122767 Memory device
06/09/2005US20050122159 Fuse circuit with controlled fuse burn out and method thereof
06/09/2005US20050122120 Method and apparatus for characterizing shared contacts in high-density SRAM cell design
06/09/2005DE69533077T2 Speichersystem mit hierarchischer Speicherplattenanordnung und Abbildungsspeicher zur Dauerspeicherung der virtuellen Abbildungsinformation Storage system with hierarchical disk array and image memory for permanent storage of the virtual mapping information
06/09/2005DE60103635T2 Vorrichtung und verfahren zur verbesserung der prüfung, des ertrags und der leistung von vlsi schaltungen Apparatus and methods for improvement of the audit, the yield and performance of VLSI circuits, the
06/09/2005DE10355296B3 Testing device for wafer testing of digital semiconductor circuits with signal amplifiers inserted in test signal channels for eliminating signal attentuation and noise
06/09/2005DE10339787A1 Speichermodul und Verfahren zum Betreiben eines Speichermoduls Memory module and method of operating a memory module
06/09/2005DE102004012279B3 Self-testing method for memories embedded in semicomnductor chip using memory self-testing control with memory self-testing register for storing memory test configuration data
06/08/2005EP1538635A1 Scan testable first-in first-out architecture
06/08/2005EP1537586A2 Circuit and method for testing embedded dram circuits through direct access mode
06/08/2005EP1537496A1 Method and apparatus for integrating primary data storage with local and remote data protection
06/08/2005EP1537426A2 Integrated circuit with embedded identification code
06/08/2005EP1459081B1 Compact ate with timestamp system
06/08/2005EP1377841B1 Low-jitter clock for test system
06/08/2005CN1625782A Integrated circuit with storage device and method for testing the integrated circuit
06/08/2005CN1624807A Automatic bit fail mapping for embedded memories with clock multipliers
06/07/2005US6904556 Systems and methods which utilize parity sets
06/07/2005US6904552 Circuit and method for test and repair
06/07/2005US6904551 Method and circuit for setup and hold detect pass-fail test mode
06/07/2005US6903997 Operation verification system and adaptive control system
06/07/2005US6903995 Test structure for the measurement of contact to gate distance in non-volatile memory devices and corresponding test method
06/07/2005US6903992 Repair fuse box of semiconductor device
06/07/2005US6903986 Method and apparatus for improving the reliability of the reading of integrated circuit fuses
06/07/2005US6903976 Semiconductor memory device reduced in power consumption during burn-in test
06/07/2005US6903973 Semiconductor memory device
06/07/2005US6903427 Mask programmable read-only memory based on nF-opening mask
06/07/2005US6903423 Integrated semiconductor memory and method for reducing leakage currents in an integrated semiconductor
06/07/2005US6903367 Programmable memory address and decode circuits with vertical body transistors
06/02/2005WO2005050465A2 Lane testing with variable mapping
06/02/2005US20050120284 Memory testing
06/02/2005US20050120283 CAM test structures and methods therefor
06/02/2005US20050120270 Automatic bit fail mapping for embedded memories with clock multipliers
06/02/2005US20050120268 System and method for testing a memory using DMA
06/02/2005US20050120265 Data storage system with error correction code and replaceable defective memory
06/02/2005US20050119849 Calibration of memory circuits
06/02/2005US20050117437 Semiconductor memory device, write control circuit and write control method for the same
06/02/2005US20050117433 Semiconductor device
06/02/2005US20050117425 Method for optimizing MRAM circuit performance
06/02/2005US20050117422 Semiconductor integrated circuit including semiconductor memory
06/02/2005US20050117420 Memory test circuit and test system
06/02/2005US20050117417 Package map data outputting circuit of semiconductor memory device and method for outputting package map data
06/02/2005US20050117416 Address decoding circuit and method for addressing a regular memory area and a redundant memory area in a memory circuit
06/02/2005US20050117412 Selecting a magnetic memory cell write current
06/02/2005US20050117409 Selecting a magnetic memory cell write current
06/02/2005US20050117401 Techniques of recovering data from memory cells affected by field coupling with adjacent memory cells
06/02/2005US20050117395 Method for operating a memory device
06/02/2005US20050117393 Thin film magnetic memory device provided with program element
06/02/2005US20050117388 Write driver circuit in phase change memory device and method for applying write current
06/02/2005US20050116751 Method and apparatus for improving stability and lock time for synchronous circuits
06/02/2005US20050116338 Semiconductor device
06/02/2005US20050116314 Semiconductor memory integrated circuit and layout method of the same
06/02/2005US20050116222 Memory device and method for burn-in test
06/02/2005DE102004030543A1 Magnetspeicher mit einem Kalibrierungssystem Magnetic memory with a calibration system
06/01/2005EP1536431A1 Memory architecture for data storage
06/01/2005EP1535284A1 Reference voltage generation for memory circuits
06/01/2005EP1535192A2 Processor array
06/01/2005EP1535131A2 System and method for self-testing and repair of memory modules
06/01/2005EP1476880B1 Non-volatile redundancy addresses memory
06/01/2005CN1622221A Apparatus and method of analyzing magnetic random access memory
06/01/2005CN1204562C Semiconductor storage device for shortening test time
06/01/2005CN1204497C Dual-ported cams for simultaneous operation flash memory
05/2005
05/31/2005US6901552 System for storing data words in a RAM module
05/31/2005US6901551 Method and apparatus for protection of data utilizing CRC
05/31/2005US6901545 Testing method for permanent electrical removal of an integrated circuit output after packaging
05/31/2005US6901542 Internal cache for on chip test data storage
05/31/2005US6901541 Memory testing method and apparatus
05/31/2005US6901498 Zone boundary adjustment for defects in non-volatile memories
05/31/2005US6901025 Nonvolatile semiconductor memory device which can be programmed at high transfer speed
05/31/2005US6901016 Semiconductor memory device and electronic instrument using the same
05/31/2005US6901015 Semiconductor memory device
05/31/2005US6901014 Circuits and methods for screening for defective memory cells in semiconductor memory devices
05/31/2005US6901013 Controller for delay locked loop circuits
05/31/2005US6900656 Method of testing an integrated circuit and an integrated circuit test apparatus
05/26/2005WO2005048270A1 Integrated circuit, test system and method for reading out error data from said integrated circuit
05/26/2005WO2003093845A3 Semiconductor test system having multitasking algorithmic pattern generator
05/26/2005US20050114750 High reliability memory subsystem using data error correcting code symbol sliced command repowering
05/26/2005US20050114734 Method and apparatus for checking output signals of an integrated circuit
05/26/2005US20050114612 Scan testable first-in first-out architecture
05/26/2005US20050114064 Circuit for a parallel bit test of a semiconductor memory device and method thereof
05/26/2005US20050114063 Semiconductor device and testing circuit which can carries out a verifying test effectively for non-volatile memory cells
05/26/2005US20050114056 Identifying process and temperature of silicon chips
05/26/2005US20050111293 Synchronous semiconductor device, and inspection system and method for the same
05/26/2005US20050111285 Arrangement with a memory for storing data
05/26/2005US20050111282 Semiconductor memory device with refreshment control
05/26/2005US20050111272 Method for analyzing defect of SRAM cell
05/26/2005US20050111253 Apparatus and method of analyzing a magnetic random access memory
05/25/2005EP1533845A1 Semiconductor memory element and its lifetime operation starting device
05/25/2005EP0819275B1 System for testing semiconductor devices in parallel
05/25/2005EP0675502B1 Multiple sector erase flash EEPROM system
05/25/2005DE10340714B3 Teststruktur für ein Single-sided Buried Strap-DRAM-Speicherzellenfeld Test structure for a single-sided buried strap DRAM memory cell array
05/25/2005DE10238279B4 Schieberegisterkette zur Trimmung von Generatoren einer integrierten Halbleitervorrichtung Shift register chain for trimming generators of a semiconductor integrated device
05/25/2005CN1620696A Multi-mode synchronous memory device and methods of operating and testing same
05/25/2005CN1619706A Memory cell signal window testing apparatus
05/25/2005CN1619705A Testing method of multiport storage
05/25/2005CN1619701A Method of measuring threshold voltage for a NAND flash memory device
05/25/2005CN1619327A System of virtual cascade time delay alignment characteristic used for testing chip and its method
05/25/2005CN1203545C Semiconductor storage apparatus
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