Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
09/2005
09/29/2005US20050213418 Non-volatile memory device and inspection method for non-volatile memory device
09/29/2005US20050213411 Electrical fuse control of memory slowdown
09/29/2005US20050213403 Test terminal negation circuit
09/29/2005US20050213402 Semiconductor memory device and test method thereof
09/29/2005US20050213401 Semiconductor integrated circuit device
09/29/2005US20050213400 Circuit for controlling an enabling time of an internal control signal according to an operating frequency of a memory device and the method thereof
09/29/2005US20050213397 Data compression read mode for memory testing
09/29/2005US20050213394 Multiple-select multiplexer circuit, semiconductor memory device including a multiplexer circuit and method of testing the semiconductor memory device
09/29/2005US20050213363 Non-volatile memory device and inspection method for non-volatile memory device
09/29/2005US20050213269 Integrated circuit for determining a voltage
09/29/2005US20050212906 Methods and systems for processing a device, methods and systems for modeling same and the device
09/29/2005US20050212555 Semiconductor circuit
09/29/2005US20050212527 Detecting the status of an electrical fuse
09/29/2005US20050211890 Method for evaluating semiconductor device error and system for supporting the same
09/29/2005DE102004012238A1 Arrangement of semiconductor elements on a wafer has capacitors near sawing edge and fuse elements near chips for testing
09/29/2005DE102004010783A1 Verfahren und Schaltungsanordnung zum Testen elektrischer Bausteine Method and circuit arrangement for testing electrical components
09/28/2005EP1580810A2 A semiconductor device with a plurality of ground planes
09/28/2005EP1579483A2 System and method for expanding a pulse width
09/28/2005EP1579460A2 Various methods and apparatuses to track failing memory locations to enable implementations for invalidating repeatedly failing memory locations
09/28/2005CN1675633A 处理器阵列 Processor Array
09/28/2005CN1674245A Method for evaluating semiconductor device error and system for supporting the same
09/28/2005CN1674157A Non-volatile semiconductor memory device and writing method therefor
09/28/2005CN1674150A 半导体存储器件 The semiconductor memory device
09/28/2005CN1674149A 半导体存储器件 The semiconductor memory device
09/28/2005CN1674145A Circuit for controlling an enabling time of an internal control signal according to an operating frequency of a memory device and the method thereof
09/28/2005CN1674144A Semiconductor memory device and reading out method for redundancy remedial address
09/28/2005CN1673969A Method for monitoring simulation chip internal CCPROM
09/28/2005CN1673760A Apparatus for testing USB memory and method thereof
09/28/2005CN1220986C Nonvolatile internal storage reliability test method and circuit
09/27/2005US6950978 Method and apparatus for parity error recovery
09/27/2005US6950971 Using data compression for faster testing of embedded memory
09/27/2005US6950771 Correlation of electrical test data with physical defect data
09/27/2005US6950362 Semiconductor memory device
09/27/2005US6950359 Memory bit line leakage repair
09/27/2005US6950358 Circuit arrangement for setting a voltage supply for a test mode of an integrated memory
09/27/2005US6950357 Test mode flag signal generator of semiconductor memory device
09/27/2005US6950356 Non-volatile memory test structure and method
09/27/2005US6950355 System and method to screen defect related reliability failures in CMOS SRAMS
09/27/2005US6950353 Cell data margin test with dummy cell
09/27/2005US6950352 Method and apparatus for replacing a defective cell within a memory device having twisted bit lines
09/27/2005US6950351 Repair circuit
09/27/2005US6950339 Circuit for generating trim bit signal in a flash memory device
09/27/2005US6950334 Magnetic random access memory having test circuit and test method therefor
09/27/2005US6949986 Semiconductor device unlikely to make incorrect determination of fuse blow
09/27/2005US6949969 Semiconductor device having relief circuit for relieving defective portion
09/27/2005US6949953 Method and apparatus for providing a preselected voltage to test or repair a semiconductor device
09/27/2005US6949947 Test mode circuit of semiconductor device
09/22/2005WO2005088645A1 Test device and test method
09/22/2005WO2005088644A1 Dft technique for stressing self-timed semiconductor memories to detect delay faults
09/22/2005WO2005088643A1 Method for detecting resistive bridge defects in the global data bus of semiconductor memories
09/22/2005WO2003073805A3 Improved patching methods and apparatus for fabricating memory modules
09/22/2005US20050210362 Recording medium with status information thereon which changes upon reformatting and apparatus and methods for forming, recording, and reproducing the recording medium
09/22/2005US20050210361 Encoding apparatus
09/22/2005US20050210348 Microcomputer and method of testing same
09/22/2005US20050210344 Non-volatile memory evaluating method and non-volatile memory
09/22/2005US20050210334 Discrete tests for weak bits
09/22/2005US20050210196 Memory module having an integrated circuit buffer device
09/22/2005US20050210186 Semiconductor device
09/22/2005US20050209715 Monitoring device for monitoring internal signals during initialization of an electronic circuit unit
09/22/2005US20050207259 Non-volatile semiconductor memory device and writing method therefor
09/22/2005US20050207258 Memory device with common row interface
09/22/2005US20050207255 System having a controller device, a buffer device and a plurality of memory devices
09/22/2005US20050207252 Semiconductor storage device, test method therefor, and test circuit therefor
09/22/2005US20050207245 Bank selectable parallel test circuit and parallel test method thereof
09/22/2005US20050207244 Semiconductor memory and redundancy repair method
09/22/2005US20050207243 Semiconductor memory device with redundancy circuit
09/22/2005US20050207242 Semiconductor memory device with a hierarchical bit lines, having row redundancy means
09/22/2005US20050207237 Semiconductor memory device provided with constant-current circuit having current trimming function
09/22/2005US20050207234 Offset compensation in local-probe data storage devices
09/22/2005US20050205983 Semiconductor memory device and multi-chip module comprising the semiconductor memory device
09/22/2005DE19706534B4 Halbleitereinrichtung, bei der eine interne Funktion entsprechend einem Potential einer speziellen Anschlußfläche bestimmt wird, und Verfahren des Bestimmens einer internen Funktion einer Halbleitereinrichtung A semiconductor device in which an internal function in accordance with a potential of a specific terminal area is determined, and procedures of determining an internal function of a semiconductor device
09/22/2005DE102004053559A1 Drahtloses, berührungsloses Testen von integrierten Schaltungen Wireless, contactless testing of integrated circuits
09/22/2005DE10102432B4 Testschaltung zur analogen Messung von Bitleitungssignalen ferroelektrischer Speicherzellen Test circuit for analog measurement of bit line signals ferroelectric memory cells
09/21/2005EP1576609A2 Method of address individual memory devices on a memory module
09/21/2005EP1576445A2 Methods and apparatus for improved memory access
09/21/2005EP0983550A4 Increasing memory performance in flash memory devices by performing simultaneous write operation to multiple devices
09/21/2005CN1672134A Penalty free address decoding scheme
09/21/2005CN1670937A Non-volatile memory evaluating method and non-volatile memory
09/21/2005CN1670865A Method and apparatus for automatic diagnosis and planning of flash memory and related system thereof
09/21/2005CN1670853A Encoding apparatus
09/21/2005CN1220264C Semiconductor IC and manufacturing method thereof
09/20/2005US6948112 System and method for performing backward error recovery in a computer
09/20/2005US6947350 Synchronous controlled, self-timed local SRAM block
09/20/2005US6947349 Apparatus and method for producing an output clock pulse and output clock generator using same
09/20/2005US6947340 Memory device for reducing skew of data and address
09/20/2005US6947329 Method for detecting a resistive path or a predetermined potential in non-volatile memory electronic devices
09/20/2005US6947326 Nonvolatile semiconductor memory and method of operating the same
09/20/2005US6947322 Semiconductor memory device
09/20/2005US6947319 Increased sensitivity in local probe of magnetic properties
09/20/2005US6947318 Magnetic random access memory
09/20/2005US6947315 Magnetic random access memory device having write test mode
09/20/2005US6947307 Package map data outputting circuit of semiconductor memory device and method for outputting package map data
09/20/2005US6947306 Backside of chip implementation of redundancy fuses and contact pads
09/20/2005US6946985 Device for reconfiguring a faulty storage assembly
09/20/2005US6946863 Circuit and method for measuring and forcing an internal voltage of an integrated circuit
09/15/2005US20050204274 Parity checking circuit for continuous checking of the party of a memory cell
09/15/2005US20050204267 Data recording/reproducing system, data recording/reproducing method, program, and recording medium
09/15/2005US20050204264 Error correction circuit
09/15/2005US20050204245 Method of timing calibration using slower data rate pattern
09/15/2005US20050204239 Method for testing semiconductor integrated circuit
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