Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
10/2005
10/13/2005US20050229081 Apparatus for accessing and transferring optical data
10/13/2005US20050229080 Semiconductor memory device equipped with error correction circuit
10/13/2005US20050229077 Semiconductor storage device
10/13/2005US20050229076 Semiconductor device and testing method for same
10/13/2005US20050229070 Method of detecting error location, and error detection circuit, error correction circuit, and reproducing apparatus using the method
10/13/2005US20050229067 Semiconductor integrated circuit
10/13/2005US20050229065 Semiconductor integrated ciruit which properly executes an operational test of a circuit under test in the semiconductor integrated circuit
10/13/2005US20050229060 Method and apparatus for detecting array degradation and logic degradation
10/13/2005US20050229054 Integrated circuit
10/13/2005US20050229052 Method, system and program product for autonomous error recovery for memory devices
10/13/2005US20050229051 Delay detecting apparatus of delay element in semiconductor device and method thereof
10/13/2005US20050229050 Semiconductor device
10/13/2005US20050228938 Method and system for secure erasure of information in non-volatile memory in an electronic device
10/13/2005US20050226114 Method and apparatus for generating absolute time in pregroove data
10/13/2005US20050226088 Method and apparatus for low capacitance, high output impedance driver
10/13/2005US20050226080 Memory module and impedance calibration method of semiconductor memory device
10/13/2005US20050226067 Nonvolatile memory cell operating by increasing order in polycrystalline semiconductor material
10/13/2005US20050226065 Semiconductor memory device capable of detecting repair address at high speed
10/13/2005US20050226063 Method for skip over redundancy decode with very low overhead
10/13/2005US20050226034 Resistance change sensor
10/13/2005US20050225917 Integrated semiconductor circuit and method for testing the same
10/13/2005US20050224942 Semiconductor device with a plurality of ground planes
10/13/2005DE69533570T2 Verfahren und System zum Erkennen von Datenverlust in einem hierarchischen Datenspeichersystem A method and system for detecting data loss in a hierarchic data storage system
10/13/2005DE19926129B4 Verfahren und Vorrichtung zum Testen von Photoempfängerarrays und von zugeordneten Lesekanälen A method and apparatus for testing photoreceptor arrays and associated read channels
10/13/2005DE102004013429A1 Überwachungsvorrichtung zur Überwachung interner Signale während einer Initialisierung einer elektronischen Schaltungseinheit Monitoring device to monitor internal signals during initialization of an electronic circuit unit
10/13/2005DE102004009693A1 Technik zum Kombinieren eines Abtasttests und eines eingebauten Speicherselbsttests Technique for combining a scan test and a built-in memory selftest
10/12/2005EP1585139A1 An on-chip and at-speed tester for testing and characterization of different types of memories
10/12/2005EP1585137A1 Synchronous global controller for enhanced pipelining
10/12/2005EP1585007A1 Method and system for secure erasure of information in non-volatile memory in an electronic device
10/12/2005EP1584936A1 Test terminal negation circuit
10/12/2005CN1682364A Apparatus for testing semiconductor device
10/12/2005CN1682314A Circuit and method for testing embedded dram circuits
10/12/2005CN1681048A Testing method of memory address line
10/12/2005CN1681046A 快闪存储器 Flash memory
10/12/2005CN1681041A Resistance change sensor
10/11/2005US6954889 Circuit for modifying stored data
10/11/2005US6954827 Cache memory capable of selecting size thereof and processor chip having the same
10/11/2005US6954399 Column repair circuit
10/11/2005US6954396 Semiconductor memory device having the operating voltage of the memory cell controlled
10/11/2005US6954394 Integrated circuit and method for selecting a set of memory-cell-layer-dependent or temperature-dependent operating conditions
10/11/2005US6954057 Method and apparatus providing final test and trimming for a power supply controller
10/06/2005WO2005093762A1 Memory defect detection and self-repair technique
10/06/2005WO2005093761A1 Method for detecting resistive-open defects in semiconductor memories
10/06/2005WO2005093443A1 Test device and test method
10/06/2005US20050223303 Memory channel self test
10/06/2005US20050223289 Semiconductor embedded memory devices having bist circuit situated under the bonding pads
10/06/2005US20050223273 Device and method for configuring a cache tag in accordance with burst length
10/06/2005US20050223265 Memory testing
10/06/2005US20050223179 Buffer device and method of operation in a buffer device
10/06/2005US20050222796 Method for testing an integrated semiconductor memory with a shortened reading time
10/06/2005US20050222789 Automatic test system
10/06/2005US20050219923 EEPROM and method of testing same
10/06/2005US20050219922 Semiconductor device having redundancy circuit
10/06/2005US20050219920 Semiconductor memory and method for manufacturing the same
10/06/2005US20050219916 Non-volatile CMOS reference circuit
10/06/2005US20050219911 Non-volatile memory circuit and semiconductor device
10/06/2005US20050219905 Memory device for improved reference current configuration
10/06/2005US20050219898 Dedicated redundancy circuits for different operations in a flash memory device
10/06/2005US20050219890 Semiconductor storage device and method of controlling refreshing of semiconductor storage device
10/06/2005US20050219886 Memory device with built-in test function and method for controlling the same
10/06/2005US20050219885 Thin film magnetic memory device storing program information efficiently and stably
10/06/2005US20050218960 Integrated circuit
10/06/2005US20050218923 Semiconductor wafer and semiconductor device manufacturing method using the same
10/06/2005US20050218922 Method and apparatus for testing defective portion of semiconductor device
10/06/2005US20050218919 Apparatus and method for testing semiconductor device
10/06/2005US20050218918 Apparatus for determining burn-in reliability from wafer level burn-in
10/06/2005US20050218917 Semiconductor component with internal heating
10/06/2005DE102005008072A1 Dynamisches Halbleiterspeicherelement Dynamic semiconductor memory element
10/05/2005EP1583103A1 Controlling the generation and selection of addresses to be used in a verification environment
10/05/2005EP1583102A1 A sequential program-verify method with result buffering
10/05/2005EP1583009A1 Method and apparatus for designing and manufacturing electronic circuits subject to process variations
10/05/2005EP1583007A2 Method for evaluating semiconductor device error and system for supporting the same
10/05/2005EP1582093A2 Improved patching methods and apparatus for fabricating memory modules
10/05/2005EP1581870A2 Semiconductor test system storing pin calibration data, commands and other data in non-volatile memory
10/05/2005CN1679118A Built-in-self-test of flash memory cells
10/05/2005CN1679011A Method and apparatus for optimizing timing for a multi-drop bus
10/05/2005CN1678917A Integrated circuit with embedded identification code
10/05/2005CN1677874A Method of detecting error location, and error detection circuit, error correction circuit using same
10/05/2005CN1677638A Method and apparatus for testing defective portion of semiconductor device
10/05/2005CN1677576A Method for realizing memory data check using look-up function instruction
10/05/2005CN1677574A Non-volatile memory circuit and semiconductor device
10/05/2005CN1677573A Semiconductor memory and method for manufacturing the same
10/05/2005CN1677570A Nonvolatile semiconductor memory device for writing multivalued data
10/05/2005CN1677563A Semiconductor device and testing method for same
10/05/2005CN1677119A Test terminal negation circuit
10/05/2005CN1221808C Method and equipment for testing semiconductor device
10/04/2005US6952623 Permanent chip ID using FeRAM
10/04/2005US6952378 Method for on-die detection of the system operation frequency in a DRAM to adjust DRAM operations
10/04/2005US6952373 Semiconductor device having PLL-circuit
10/04/2005US6952372 Semiconductor memory device capable of testing data line redundancy replacement circuit
10/04/2005US6952111 Apparatus and method for universally testing semiconductor devices with different pin arrangement
09/2005
09/29/2005WO2005091305A1 Test device and test method
09/29/2005WO2005091304A1 Memory device with redundancy having common row interface
09/29/2005US20050216811 Apparatus for testing USB memory and method thereof
09/29/2005US20050216810 Semiconductor integrated circuit and memory test method
09/29/2005US20050216809 Memory module with parallel testing
09/29/2005US20050216808 Method and circuit arrangement for testing electrical modules
09/29/2005US20050216806 Edge-triggered master + lssd slave binary latch
09/29/2005US20050216800 Deterministic preventive recovery from a predicted failure in a distributed storage system
09/29/2005US20050216799 Method for detecting resistive-open defects in semiconductor memories
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