Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
08/2005
08/11/2005US20050177781 Method and apparatus for accessing memory
08/11/2005US20050176174 Methodof making an integrated circuit
08/11/2005US20050174878 Semiconductor memory module, memory system, circuit, semiconductor device, and DIMM
08/11/2005US20050174863 Integrated semiconductor memory having redundant memory cells
08/11/2005US20050174862 Semiconductor memory device and method of testing semiconductor memory device
08/11/2005US20050174861 Phase-change memory device and method of manufacturing the same
08/11/2005US20050174859 Bias voltage applying circuit and semiconductor memory device
08/11/2005US20050174844 Multi-bit-per-cell flash EEPROM memory with refresh
08/11/2005US20050174833 Semiconductor integrated circuit device
08/11/2005US20050174827 [device and method for compensating defect in semiconductor memory]
08/11/2005US20050174138 Method, circuit and system for determining burn-in reliability from wafer level burn-in
08/11/2005US20050173699 Semiconductor memory element and its lifetime operation starting device
08/11/2005DE10393445T5 Testgerät und Testverfahren Test apparatus and test procedure
08/10/2005EP1562201A2 Bias voltage applying circuit and semiconductor memory device
08/10/2005EP0997913B1 Method and circuit for testing virgin memory cells in a multilevel memory device
08/10/2005CN1653554A Increasing the effectiveness of error correction codes and operating multi-level memory systems by using information about the quality of the stored data
08/10/2005CN1653553A Content addressable memory (CAM) with error checking and correction (ECC) capability
08/10/2005CN1653346A Tester system having a multi-purpose memory
08/10/2005CN1652255A Semiconductor memory device and method of testing semiconductor memory device
08/10/2005CN1652250A Redundancy relieving circuit
08/09/2005US6928598 Scan method for built-in-self-repair (BISR)
08/09/2005US6928596 Test circuit of semiconductor integrated circuit
08/09/2005US6928595 Medium reading apparatus
08/09/2005US6928594 Semiconductor integrated circuit
08/09/2005US6928593 Memory module and memory component built-in self test
08/09/2005US6928591 Fault repair controller for redundant memory integrated circuits
08/09/2005US6928588 System and method of improving memory yield in frame buffer memory using failing memory location
08/09/2005US6928377 Self-test architecture to implement data column redundancy in a RAM
08/09/2005US6928376 Apparatus and methods for ferroelectric ram fatigue testing
08/09/2005US6928026 Synchronous global controller for enhanced pipelining
08/09/2005US6928022 Write driver circuit in phase change memory device and method for applying write current
08/09/2005US6928019 Semiconductor device with self refresh test mode
08/09/2005US6928011 Electrical fuse control of memory slowdown
08/09/2005US6928010 Semiconductor integrated circuit device capable of tuning of internal power supply voltages generated by a plurality of internal power generating circuits
08/09/2005US6928009 Redundancy circuit for memory array and method for disabling non-redundant wordlines and for enabling redundant wordlines
08/09/2005US6928008 Semiconductor memory devices with data line redundancy schemes and method therefore
08/09/2005US6928000 Semiconductor memory device having a resistance adjustment unit
08/09/2005US6927603 Semiconductor integrated circuit having system bus divided in stages
08/09/2005US6927594 Evaluation device for evaluating semiconductor device
08/09/2005US6927591 Method and system for wafer and device level testing of an integrated circuit
08/09/2005US6926544 Flash memory apparatus having single body type rotary cover
08/04/2005US20050172194 Remote bist high speed test and redundancy calculation
08/04/2005US20050172192 Scan based automatic test pattern generation (ATPG) test circuit, test method using the test circuit, and scan chain reordering method
08/04/2005US20050172180 Programmable built in self test of memory
08/04/2005US20050172179 System and method for configuring a solid-state storage device with error correction coding
08/04/2005US20050172178 Cache-testable processor identification
08/04/2005US20050172177 Semiconductor memory device for correcting errors using ECC (error correcting code) circuit
08/04/2005US20050170689 Socket and/or adapter device for testing semi-conductor components, and an apparatus and process for loading a socket and/or adapter device with a corresponding semi-conductor component
08/04/2005US20050169097 Method and apparatus for coordinating memory operations among diversely-located memory components
08/04/2005US20050169095 Bit line discharge control method and circuit for a semiconductor memory
08/04/2005US20050169089 Method and circuit for locating anomalous memory cells
08/04/2005US20050169087 Semiconductor memory device capable of operating at high speed and with low power consumption while ensuring reliability of memory cell
08/04/2005US20050169072 Pattern generator, memory controller, and test device
08/04/2005US20050169067 Memory device capable of performing high speed reading while realizing redundancy replacement
08/04/2005US20050169060 Semiconductor integrated circuit device and control method for the semiconductor integrated circuit device
08/04/2005US20050169059 Current threshold detector
08/04/2005US20050169053 Window-based flash memory storage system and management and access methods thereof
08/04/2005US20050169045 Storage device employing a flash memory
08/04/2005US20050167728 Single-poly 2-transistor based fuse element
08/04/2005DE102004048690A1 Antischmelzsicherungs-Programmierschaltung mit einer Transistorstufe, die während der Programmierung in einer Reihe mit der Antischmelzsicherung zwischen die Stromzuführungen eingesetzt ist Antifuse programming circuit with a transistor stage which is used during programming in a series with the anti-fuse between the supply leads
08/04/2005DE102004032689A1 Semiconductor memory device operation testing method, involves generating internal bank addresses in response to bank interleaving test signal, and receiving addresses for testing read and write operation of memory device
08/03/2005EP1560223A2 A current threshold detector
08/03/2005EP1559013A2 Memory controllers with interleaved mirrored memory modes
08/03/2005CN1650371A Flexible redundancy for memories
08/03/2005CN1650370A Redundancy in chained memory architectures
08/03/2005CN1649034A Test device for masiac storage
08/03/2005CN1649030A Semiconductor memory device
08/03/2005CN1649029A Current threshold detector
08/03/2005CN1648876A Data management apparatus and method of flash memory
08/03/2005CN1213540C Error detecting/correcting circuit
08/03/2005CN1213470C Semiconductor device and checkup apparatus thereof
08/03/2005CN1213436C Semiconductor storage working at low power consumption
08/02/2005US6925591 Method and apparatus for providing full accessibility to instruction cache and microcode ROM
08/02/2005US6925579 Device and method for configuring a cache tag in accordance with burst length
08/02/2005US6925022 Refresh-free dynamic semiconductor memory device
08/02/2005US6925018 System-in-package type semiconductor device
08/02/2005US6925012 Storage device employing a flash memory
08/02/2005US6925002 Semiconductor memory having mutually crossing word and bit lines, at which magnetoresistive memory cells are arranged
08/02/2005US6924998 FeRAM using programmable register
07/2005
07/28/2005US20050166134 Semiconductor integrated circuit device
07/28/2005US20050166113 Semiconductor device-testing apparatus
07/28/2005US20050166111 Memory built-in self test circuit with full error mapping capability
07/28/2005US20050166103 System, method, and apparatus for firmware code-coverage in complex system on chip
07/28/2005US20050166102 CAM expected address search testmode
07/28/2005US20050166097 Semiconductor memory device having advanced test mode
07/28/2005US20050166088 Storage device employing a flash memory
07/28/2005US20050166087 Non-volatile memory and method with phased program failure handling
07/28/2005US20050166026 Configurable width buffered module having switch elements
07/28/2005US20050166017 Loosely coupled mass storage computer cluster
07/28/2005US20050163915 mixing isotopes with liquid or powder matrices, then curing and annealing, to form test systems that mimic alpha-ray emissions from moldings used to encapsulate electronic or flip chip packages
07/28/2005US20050162967 Flash array implementation with local and global bit lines
07/28/2005US20050162963 Memory redundancy programming
07/28/2005US20050162954 Semiconductor memory
07/28/2005US20050162949 Method for testing an integrated semiconductor memory, and integrated semiconductor memory
07/28/2005US20050162948 Providing memory test patterns for DLL calibration
07/28/2005US20050162947 Data management apparatus and method of flash memory
07/28/2005US20050162945 Semiconductor memory device having repair circuit
07/28/2005US20050162934 Status register to improve initialization of a synchronous memory
07/28/2005US20050162931 Reference current generator, and method of programming, adjusting and/or operating same
07/28/2005US20050162930 Memory controller, flash memory system, and method for recording data on flash memory
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