| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 03/28/2006 | US7020034 Method and apparatus for dynamically hiding a defect in an embedded memory |
| 03/28/2006 | US7020033 Semiconductor memory apparatus and self-repair method |
| 03/28/2006 | US7020003 Device and method for compensating defect in semiconductor memory |
| 03/28/2006 | US7019545 Method for monitoring quality of an insulation layer |
| 03/28/2006 | US7019534 Detecting the status of an electrical fuse |
| 03/28/2006 | US7017430 Inspection device and inspection method of dielectric film, and method of manufacturing semiconductor device |
| 03/28/2006 | CA2415661C A method for performing write and read operations in a passive matrix memory, and apparatus for performing the method |
| 03/23/2006 | WO2006031294A1 Reconfigurable computing architecture for space applications |
| 03/23/2006 | WO2006031261A2 Storage device parity computation |
| 03/23/2006 | US20060064624 Writing and reading of data in probe-based data storage devices |
| 03/23/2006 | US20060064611 Method of testing memory module and memory module |
| 03/23/2006 | US20060062060 Methods and circuits for programming addresses of failed memory cells in a memory device |
| 03/23/2006 | US20060062038 Content addressable memory device |
| 03/23/2006 | US20060061376 Electronic circuit with test unit |
| 03/23/2006 | DE10324080B4 Verfahren zum Testen von zu testenden Schaltungseinheiten in einer Testvorrichtung A method of testing of circuit units to be tested in a test device |
| 03/23/2006 | DE102005044073A1 Speicherbauelement und Verfahren zur Fehlerdetektion Memory device and method for error detection |
| 03/23/2006 | DE102005040226A1 Nichtflüchtiges Speicherbauelement und Testverfahren A non-volatile memory device and test method |
| 03/23/2006 | DE102005034922A1 Algorithm pattern generator for memory tester, includes address and data generator for generating address and data logic for memory device test via address and data scrambling with respect to each cycle |
| 03/23/2006 | DE102004063946A1 Transistor Transistor |
| 03/23/2006 | DE102004036786A1 Semiconductor circuit has configuration device configuring integrated circuit depending upon current condition of conditioning unit, and selection device enabling selection of information, which depends on condition of conditioning unit |
| 03/23/2006 | DE102004036702A1 Integrated semiconductor memory, has compression unit to compress comparison data to compressed error date that is selectable over external data connection, and switching unit is switched between comparator and compression circuits |
| 03/23/2006 | DE102004036546A1 Integrierter Halbleiterspeicher Integrated semiconductor memory |
| 03/23/2006 | DE102004036145A1 Halbleiterschaltungseinrichtung und System zum Testen einer Halbleitervorrichtung Semiconductor circuit device and system for testing a semiconductor device |
| 03/22/2006 | EP1638033A2 Self testing and securing RAM system and method |
| 03/22/2006 | EP1377981A4 Method and system to optimize test cost and disable defects for scan and bist memories |
| 03/22/2006 | CN1751357A Memory having variable refresh control and method therefor |
| 03/22/2006 | CN1751356A Variable refresh control for a memory |
| 03/22/2006 | CN1750172A Nonvolatile memory devices with test data buffers and methods for testing same |
| 03/22/2006 | CN1246854C IC storage with fuse detection circuit and its method |
| 03/21/2006 | US7017101 Information storage medium, information recording method and information processing method |
| 03/21/2006 | US7017090 Semiconductor module including semiconductor memory device shiftable to test mode as well as semiconductor memory device used therein |
| 03/21/2006 | US7017089 Method and apparatus for testing a content addressable memory device |
| 03/21/2006 | US7017088 Graphical system and automated pattern generator for testing arrays |
| 03/21/2006 | US7017017 Memory controllers with interleaved mirrored memory modes |
| 03/21/2006 | US7017002 System featuring a master device, a buffer device and a plurality of integrated circuit memory devices |
| 03/21/2006 | US7016257 Semiconductor memory device capable of generating variable clock signals according to modes of operation |
| 03/21/2006 | US7016255 Multi-port memory device |
| 03/21/2006 | US7016248 Method and apparatus for controlling a high voltage generator in a wafer burn-in test |
| 03/21/2006 | US7016247 Semiconductor memory apparatus |
| 03/21/2006 | US7016244 Method and arrangement for testing output circuits of high speed semiconductor memory devices |
| 03/21/2006 | US7016242 Semiconductor memory apparatus and self-repair method |
| 03/21/2006 | US7016241 Semiconductor device, nonvolatile semiconductor memory, system including a plurality of semiconductor devices or nonvolatile semiconductor memories, electric card including semiconductor device or nonvolatile semiconductor memory, and electric device with which this electric card can be used |
| 03/21/2006 | US7016232 Non-volatile semiconductor memory device |
| 03/21/2006 | US7016215 Ferroelectric memory device with a spare memory cell array |
| 03/21/2006 | US7015743 Circuit of redundancy IO fuse in semiconductor device |
| 03/21/2006 | US7015740 Self-adjusting programmable on-chip clock aligner |
| 03/21/2006 | US7015739 Integrated circuit devices having duty cycle correction circuits that receive control signals over first and second separate paths and methods of operating the same |
| 03/21/2006 | US7015718 Register file apparatus and method for computing flush masks in a multi-threaded processing system |
| 03/16/2006 | US20060059408 Disk array system |
| 03/16/2006 | US20060059407 Network system, data transmission device, terminal device and multicasting method |
| 03/16/2006 | US20060059406 Memory with embedded error correction codes |
| 03/16/2006 | US20060059405 Using a phase change memory as a high volume memory |
| 03/16/2006 | US20060059396 Semiconductor integrated circuit having bonding optional function |
| 03/16/2006 | US20060059394 Loop-back method for measuring the interface timing of semiconductor memory devices using the normal mode memory |
| 03/16/2006 | US20060059393 Redundancy register architecture for soft-error tolerance and methods of making the same |
| 03/16/2006 | US20060056258 Semiconductor memory and method for operating the same |
| 03/16/2006 | US20060056249 Semiconductor memory storage device and its control method |
| 03/16/2006 | US20060056247 Memory device |
| 03/16/2006 | US20060056246 Semiconductor memory device outputting identifying and roll call information |
| 03/16/2006 | DE102005036567A1 Defektverwaltungsfähiger Pirm und Verfahren Defect management-capable PIRM and procedures |
| 03/16/2006 | DE102005031524A1 Redundancy program circuit for testing semiconductor device during fabrication, multiplexes decoding address signal bits based on operating status signal from each control fuse and operation enable signal from master fuse |
| 03/16/2006 | DE102005028827A1 Flashspeicherbauelement und Verfahren zur Defektblockbehandlung Flash memory device and method for defect block treatment |
| 03/16/2006 | DE102004042072A1 Verfahren zum Testen einer zu testenden Schaltungseinheit und Testvorrichtung zur Durchführung des Verfahrens A method of testing a circuit under test unit and test device for carrying out the method |
| 03/16/2006 | DE102004041731B3 Speichermodul zum Bereitstellen einer Speicherkapazität Memory module for providing a storage capacity |
| 03/16/2006 | DE102004041552A1 Testverfahren mit Optimierung der Testabdeckung und Testvorrichtung zur Durchführung des Testverfahrens Test method with optimization of test coverage and test device for performing the assay method |
| 03/16/2006 | DE102004036545B3 Integrierter Halbleiterspeicher mit redundanten Speicherzellen Integrated semiconductor memory with redundant memory cells |
| 03/16/2006 | DE10110707B4 Ferroelektrischer Speicher mit Referenzzellen-Auswahlschaltung und 2T1C-Speicherzellen A ferroelectric memory with reference cell selection circuit and 2T1C memory cells |
| 03/15/2006 | EP1634299A1 Integrity control for data stored in a non-volatile memory |
| 03/15/2006 | EP1634172A2 Fault tolerant data storage circuit |
| 03/15/2006 | EP1323039B1 Method for operating a processor-controlled system |
| 03/15/2006 | CN1747070A Semiconductor circuit device and a system for testing a semiconductor apparatus |
| 03/15/2006 | CN1747057A Memory device for reducing leakage current |
| 03/15/2006 | CN1747039A Device for encoding digital data, device for recording it to dvd, and its method |
| 03/15/2006 | CN1245677C Access rapid storage card method and device |
| 03/14/2006 | USRE39016 Memory module assembly using partially defective chips |
| 03/14/2006 | US7013414 Test method and test system for semiconductor device |
| 03/14/2006 | US7013413 Method for compressing output data and a packet command driving type memory device |
| 03/14/2006 | US7013378 Method and system for minimizing the length of a defect list for a storage device |
| 03/14/2006 | US7013376 Method and system for data block sparing in a solid-state storage device |
| 03/14/2006 | US7013369 Memory control circuit outputting contents of a control register |
| 03/14/2006 | US7012845 Nonvolatile memory with control circuit adapted to distinguish between command signal interface specifications and having an error correction function |
| 03/14/2006 | US7012844 Device information writing circuit |
| 03/14/2006 | US7012838 Nonvolatile semiconductor memory device supplying proper program potential |
| 03/14/2006 | US7012836 Nonvolatile memory and method of restoring of failure memory cell |
| 03/14/2006 | US7012830 Semiconductor memory device |
| 03/14/2006 | US7012443 System used to test plurality of DUTs in parallel and method thereof |
| 03/09/2006 | US20060053361 Memory devices with error detection using read/write comparisons |
| 03/09/2006 | US20060053360 Methods and apparatus for correcting errors in data read from a disk drive |
| 03/09/2006 | US20060053354 Test method for determining the wire configuration for circuit carriers with components arranged thereon |
| 03/09/2006 | US20060053353 Nonvolatile memory devices with test data buffers and methods for testing same |
| 03/09/2006 | US20060053319 Method and apparatus providing final test and trimming for a power supply controller |
| 03/09/2006 | US20060050599 Memory device and method for burn-in test |
| 03/09/2006 | US20060050579 High speed redundant data sensing method and apparatus |
| 03/09/2006 | US20060050577 Memory module with programmable fuse element |
| 03/09/2006 | US20060050570 Access circuit and method for allowing external test voltage to be applied to isolated wells |
| 03/09/2006 | DE19924244B4 Integrierter Speicher mit redundanten Einheiten von Speicherzellen und Testverfahren für seine redundanten Einheiten Integrated memory having redundant units of memory cells and assay methods for its redundant units |
| 03/09/2006 | DE19812198B4 Testvorrichtung für Halbleiterspeicher Test device for semiconductor memories |
| 03/09/2006 | DE102005035444A1 Verfahren zum Testen der Betriebsbrauchbarkeit von Bitleitungen in einer DRAM-Speichervorrichtung A method for testing the operating utility of bit lines in a DRAM memory device |
| 03/09/2006 | DE102004042074A1 Verfahren zum Testen eines Speichers mittels externem Testchip und Vorrichtung zur Durchführung des Verfahrens A method for testing a memory chip using an external test and device for carrying out the method |
| 03/09/2006 | DE102004041658A1 Verfahren zum Testen eines integrierten Halbleiterspeichers A method for testing an integrated semiconductor memory, |