Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
03/2006
03/09/2006DE102004040799A1 Computer memory chip testing method in which an external test unit is used and test data written to reference and test registers prior to a bit by bit comparison of the two
03/08/2006CN1745434A Improved method for reading a non-volatile memory cell adjacent to an inactive region of a non-volatile memory cell array
03/08/2006CN1745433A Zone boundary adjustment for defects in non-volatile memories
03/08/2006CN1745432A Error recovery for nonvolatile memory
03/08/2006CN1744230A Semiconductor memory devices having column redundancy circuits therein that support multiple memory blocks
03/07/2006US7010741 Method and circuit for error correction in CAM cells
03/07/2006US7010740 Data storage system having no-operation command
03/07/2006US7010735 Stuck-at fault scan chain diagnostic method
03/07/2006US7010732 Built-in test support for an integrated circuit
03/07/2006US7010729 Timing generator and test apparatus
03/07/2006US7010726 Method and apparatus for saving data used in error analysis
03/07/2006US7010643 Status register to improve initialization of a synchronous memory
03/07/2006US7010642 System featuring a controller device and a memory module that includes an integrated circuit buffer device and a plurality of integrated circuit memory devices
03/07/2006US7010623 External storage subsystem
03/07/2006US7009900 Circuit arrangement for reading out, evaluating and reading in again a charge state into a memory cell
03/07/2006US7009897 Semiconductor memory device capable of applying stress voltage to bit line pair
03/07/2006US7009896 Apparatus and method for managing bad blocks in a flash memory
03/07/2006US7009895 Method for skip over redundancy decode with very low overhead
03/07/2006US7009885 Circuit and method for reducing leakage current in a row driver circuit in a flash memory during a standby mode of operation
03/07/2006US7009883 Automatic programming time selection for one time programmable memory
03/07/2006US7009879 Test terminal negation circuit for protecting data integrity
03/07/2006US7009417 Semiconductor module and methods for functionally testing and configuring a semiconductor module
03/02/2006WO2005050465A3 Lane testing with variable mapping
03/02/2006US20060048023 Test method for nonvolatile memory
03/02/2006US20060048022 Method for testing the serviceability of bit lines in a DRAM memory device
03/02/2006US20060044916 Zero-enabled fuse-set
03/02/2006US20060044899 Method and apparatus for destroying flash memory
03/02/2006US20060044898 Semiconductor memory device and electronic equipment
03/02/2006US20060044897 Semiconductor memory having testable redundant memory cells
03/02/2006US20060044896 Defect management enabled PIRM and method
03/02/2006US20060044895 System and method for capacitive coupled via structures in information handling system circuit boards
03/02/2006DE19729163B4 System und Verfahren zur Abtaststeuerung einer programmierbaren Sicherungsschaltung in einer integrierten Schaltung System and method for scanning control of a programmable fuse circuit in an integrated circuit
03/02/2006DE19542033B4 Redundanzschaltung und Redundanzverfahren für eine Halbleiterspeichervorrichtung Redundancy circuit and method for a redundancy semiconductor memory device
03/01/2006EP1629506A1 Test of ram address decoder for resistive open defects
03/01/2006EP1629505A1 Testing ram address decoder for resistive open defects
03/01/2006CN1742344A Multiple trip point fuse latch device and test method of the fuse
03/01/2006CN1741196A Test method for nonvolatile memory
03/01/2006CN1244052C Non-volatile memory chip for computer and test method thereof
02/2006
02/28/2006US7007222 Apparatus for accessing data stored on an optical disc
02/28/2006US7007215 Test circuit capable of testing embedded memory with reliability
02/28/2006US7007211 Testing self-repairing memory of a device
02/28/2006US7007210 Method and system for handling multiple bit errors to enhance system reliability
02/28/2006US7007131 Method and apparatus including special programming mode circuitry which disables internal program verification operations by a memory
02/28/2006US7006932 Technique for determining performance characteristics of electronic devices and systems
02/28/2006US7006395 Semiconductor integrated circuit
02/28/2006US7006394 Apparatus and method for semiconductor device repair with reduced number of programmable elements
02/28/2006US7006392 Memory redundancy programming
02/28/2006US7006391 Semiconductor memory device allowing increase in capacity and operation speed with a suppressed layout area
02/28/2006US7006386 Storage device employing a flash memory
02/28/2006US7005873 Built-in self-test hierarchy for an integrated circuit
02/23/2006WO2006018947A1 Test device and test method
02/23/2006WO2005006173A9 Data storage array
02/23/2006US20060041823 Method and apparatus for storing and retrieving multiple point-in-time consistent data sets
02/23/2006US20060041801 Acceleration of the programming of a memory module with the aid of a boundary scan (bscan) register
02/23/2006US20060041800 Method and apparatus for generating and detecting initialization patterns for high speed DRAM systems
02/23/2006US20060041799 Test apparatus, phase adjusting method and memory controller
02/23/2006US20060041798 Design techniques to increase testing efficiency
02/23/2006US20060039225 Semiconductor device, nonvolatile semiconductor memory, system including a plurality of semiconductor devices or nonvolatile semiconductor memories, electric card including semiconductor device or nonvolatile semiconductor memory, and electric device with which this electric card can be used
02/23/2006US20060039213 Integrated circuit I/O using a high performance bus interface
02/23/2006US20060039210 Memory address repair without enable fuses
02/23/2006US20060039178 Device having a memory array storing each bit in multiple memory cells
02/23/2006US20060039174 Memory module with termination component
02/23/2006DE102004039393A1 Verfahren zum Testen einer Speichervorrichtung und Speichervorrichtung zur Durchführung des Verfahrens A method of testing a storage device and storage device for implementing the method
02/23/2006DE102004037590A1 Integrierte Schaltung und Verfahren zum Betrieb einer solchen Integrated circuit and method for operating such a
02/23/2006DE102004006288B4 Integrierter Halbleiterspeicher mit redundanten Speicherzellen sowie Verfahren zum Testen eines integrierten Halbleiterspeichers mit redundanten Speicherzellen und Verfahren zum Betreiben eines integrierten Halbleiterspeichers mit redundanten Speicherzellen Integrated semiconductor memory with redundant memory cells as well as methods for testing an integrated semiconductor memory with redundant memory cells and methods for operating an integrated semiconductor memory with redundant memory cells
02/23/2006DE10011180B4 Digitale Speicherschaltung Digital memory circuit
02/22/2006EP1535131A4 System and method for self-testing and repair of memory modules
02/22/2006EP0946988B1 Memory redundancy circuit using single polysilicon floating gate transistors as redundancy elements
02/22/2006CN1243376C Device and method for parallel testing semiconductor device
02/22/2006CN1243251C Modular structure for testing momery in testing system based on event
02/22/2006CN1243250C Data failure storage compression of semiconductor testing system
02/21/2006US7003714 Dynamic data space
02/21/2006US7003713 Variable Hamming error correction for a one-time-programmable-ROM
02/21/2006US7003706 Method, system, and program for improved device blocking and suspension
02/21/2006US7003704 Two-dimensional redundancy calculation
02/21/2006US7003673 Method for storing and operating on data units in a security module and associated security module
02/21/2006US7003622 Semiconductor memory
02/21/2006US7003618 System featuring memory modules that include an integrated circuit buffer devices
02/21/2006US7003432 Method of and system for analyzing cells of a memory device
02/21/2006US7002859 On-die switchable test circuit
02/21/2006US7002858 Semiconductor memory device which selectively controls a local input/output line sense amplifier
02/21/2006US7002853 Memory card having a buffer memory for storing testing instruction
02/21/2006US7002851 Storage device employing a flash memory
02/21/2006US7002844 Method of repairing a failed wordline
02/21/2006US7002831 Magnetic semiconductor memory device
02/21/2006US7002828 Flash cell fuse circuit
02/21/2006US7002822 Content addressable memory device
02/21/2006US7002500 Circuit, apparatus and method for improved current distribution of output drivers enabling improved calibration efficiency and accuracy
02/21/2006US7002367 Method and apparatus for low capacitance, high output impedance driver
02/21/2006US7002364 Semiconductor device for reducing the number of probing pad used during wafer test and method for testing the same
02/21/2006US7002232 Semiconductor integrated circuit device and method of testing the same
02/21/2006US7000648 Device picker in handler
02/16/2006US20060036921 Apparatus and method for dynamically repairing a semiconductor memory
02/16/2006US20060036918 Method and apparatus to compare pointers associated with asynchronous clock domains
02/16/2006US20060036917 Method for testing a memory device and memory device for carrying out the method
02/16/2006US20060036916 Memory with test mode output
02/16/2006US20060034145 Synchronous semiconductor memory device of fast random cycle system and test method thereof
02/16/2006US20060034143 Semiconductor memory device having the operating voltage of the memory cell controlled
02/16/2006US20060034137 Programmable memory device with an improved redundancy structure
02/16/2006US20060034136 Using redundant memory for extra features