Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
04/2006
04/18/2006US7032143 Memory data path circuit
04/18/2006US7032142 Memory circuit having parity cell array
04/18/2006US7032141 Semiconductor device including test-facilitating circuit using built-in self test circuit
04/18/2006US7031869 Method and apparatus for managing timestamps when storing data
04/18/2006US7031868 Method and apparatus for performing testing of interconnections
04/18/2006US7031864 Semiconductor device having a mode of functional test
04/18/2006US7031792 Processing apparatus and information storage apparatus and method
04/18/2006US7031211 Direct memory access interface in integrated circuits
04/18/2006US7031210 Method of measuring threshold voltage for a NAND flash memory device
04/18/2006US7031209 Methods and circuits for testing programmability of a semiconductor memory cell and memory array using a breakdown phenomenon in an ultra-thin dielectric
04/18/2006US7031208 Semiconductor memory device
04/18/2006US7031207 Semiconductor memory device with configurable on-chip delay circuit
04/18/2006US7031190 Structure for testing NAND flash memory and method of testing NAND flash memory
04/13/2006US20060080589 Memory interface with write buffer and encoder
04/13/2006US20060080058 Built-in self test for memory interconnect testing
04/13/2006US20060077735 Memory regulator system with test mode
04/13/2006US20060077734 Direct mapped repair cache systems and methods
04/13/2006US20060077733 Memory structure with repairing function and repairing method thereof
04/13/2006US20060077704 Integrated circuit including sensor to sense environmental data, and system for testing
04/13/2006DE10347467B4 Frequenzmultiplizierer und zugehöriges Multiplizierverfahren sowie Datenausgabepuffer und Halbleiterbaustein Frequency multiplier and associated multiplication method and data output buffer and semiconductor device
04/13/2006DE102005048255A1 Integriertes Schaltungsbauelement und Betriebsverfahren The integrated circuit device and method of operation
04/13/2006DE102005047377A1 Non-volatile memory device e.g. flash memory device for verifying data programmed or erased in pipelining sequence, verifies programmed or erased data stored in data storage unit while data detector is sensing new programmed or erased data
04/13/2006DE102004043050A1 Loop-back-Verfahren zur Vermessung des Interface-Timings von Halbleitervorrichtungen mit Hilfe von Signaturen und/oder Paritätsverfahren Loop-back method for measuring timing of the interface of semiconductor devices using signatures and / or parity method
04/12/2006EP1646052A1 A memory circuit with flexible bitline- and/or wordline-related defect memory cell substitution
04/12/2006EP1644819A2 Data storage array
04/12/2006EP1644748A2 Signal integrity self-test architecture
04/12/2006EP1479025A4 Methods and apparatus for semiconductor testing
04/12/2006CN1759452A Test for weak SRAM cells
04/12/2006CN1758382A Memory module with parallel testing
04/12/2006CN1251320C Semiconductor circuit device and semiconductor device
04/12/2006CN1251244C Method for built-in self-test of electronic circuit
04/12/2006CN1251100C Memory system and controlling method thereof
04/12/2006CN1251082C Method and device for detecting and deciding quick flashing storage card kind and insertion
04/11/2006US7028236 Semiconductor memory testing device
04/11/2006US7028235 Test method and test circuit for electronic device
04/11/2006US7028234 Method of self-repairing dynamic random access memory
04/11/2006US7028230 Partially filling block interleaver for a communication system
04/11/2006US7028146 Method of verifying a system in which a plurality of master devices share a storage region
04/11/2006US7027338 Semiconductor memory device with shift redundancy circuits
04/11/2006US7027330 Multi-input/output repair method of NAND flash memory device and NAND flash memory device thereof
04/11/2006US7027325 Magnetic random access memory
04/11/2006US7027316 Access circuit and method for allowing external test voltage to be applied to isolated wells
04/11/2006US7027172 Color digital printer having a graphical user interface for displaying and selecting images for local and remote printing
04/11/2006US7027155 Methods and systems for precisely relatively positioning a waist of a pulsed laser beam and method and system for controlling energy delivered to a target structure
04/11/2006US7026821 Testing MEM device array
04/11/2006US7026647 Device and method for detecting alignment of active areas and memory cell structures in DRAM devices
04/06/2006WO2006034704A1 Semiconductor memory chip comprising a rerouting circuit
04/06/2006US20060075320 Method of detecting and correcting errors for a memory and corresponding integrated circuit
04/06/2006US20060075313 Read control systems and methods
04/06/2006US20060075182 Storage control apparatus capable of analyzing volume information and a control method thereof
04/06/2006US20060071701 Defect tolerant redundancy
04/06/2006DE102004047330A1 Integrierter Halbleiterspeicher Integrated semiconductor memory
04/06/2006DE102004047058A1 Integrated semiconductor memory, e.g. for dynamic RAM, has word wires linked to voltage potentials via switches conductively controlled in a test operating condition
04/06/2006DE102004041553A1 Testverfahren zum Bestimmen der Verdrahtung von Schaltungsträgern mit darauf angeordneten Bauelementen Test method for determining the wiring of circuit carriers with components arranged thereon,
04/06/2006DE102004040196B3 Logic circuit for simultaneous processing of functional data and test data in data group uses two identical signal state stores and data is transmitted over two separate paths
04/06/2006DE102004008757B4 Paritätsprüfungs-Schaltung zur kontinuierlichen Prüfung der Parität einer Speicherzelle Parity check circuit for continuously checking the parity of a memory cell
04/05/2006EP1643509A1 Semiconductor test device and control method thereof
04/05/2006CN1755837A Redundancy program circuit and methods thereof
04/05/2006CN1755834A Semiconductor memory device, test circuit and test method
04/05/2006CN1249725C Semiconductor storage device formed for optimizing testing technique and rebundance technique
04/05/2006CN1249586C Flash memory system
04/05/2006CN1249585C Flash memory system
04/04/2006US7024614 Disk drive employing a configuration data structure comprising a plurality of configuration parameters to facilitate disk commands
04/04/2006US7024613 Method and apparatus for implementing infiniband transmit queue
04/04/2006US7024604 Process for manufacturing semiconductor device
04/04/2006US7024603 Arrangement for verifying that memory external to a network switch and the memory interface are free of defects
04/04/2006US7024598 Nonvolatile semiconductor memory device with a fail bit detecting scheme and method for counting the number of fail bits
04/04/2006US7024597 Generalized convolutional interleaver/deinterleaver
04/04/2006US7023748 Semiconductor storage device
04/04/2006US7023747 Semiconductor memory device and address conversion circuit
04/04/2006US7023736 Non-volatile memory and method with improved sensing
04/04/2006US7023731 Semiconductor memory device and portable electronic apparatus
04/04/2006US7023198 Semiconductor device and method of inspecting the same
03/2006
03/30/2006US20060069966 Method and system for testing memory using hash algorithm
03/30/2006US20060069895 Method, system and memory controller utilizing adjustable write data delay settings
03/30/2006US20060069528 Memory defect remedy analyzing method and memory test instrument
03/30/2006US20060067142 Shift redundancy circuit, method for controlling shift redundancy circuit, and semiconductor memory device
03/30/2006US20060067141 Integrated circuit buffer device
03/30/2006DE10211932B9 Schaltungsanordnung zum Auslesen, Bewerten und Wiedereinlesen eines Ladungszustandes in eine Speicherzelle Circuitry for reading, evaluating and re-reading a charge state in a memory cell
03/30/2006DE102004047813A1 Halbleiterbaustein mit einer Umlenkschaltung Semiconductor device having a diverting
03/30/2006DE102004044721A1 Selbsttest für die Phasenlage des Datenleseclocksignals DQS Self-test for the phase of the data read clock signal DQS
03/30/2006DE102004044150A1 Verbesserte künstliche Alterung von Chips mit Speicher Improved artificial aging of chips with memory
03/30/2006DE102004043051A1 Loop-back-Verfahren zur Vermessung des Interface-Timings von Halbleiterspeichervorrichtungen unter Verwendung des Normal-Mode-Speichers Loop-back method for measuring the interface timing of semiconductor memory devices using the normal-mode memory
03/30/2006DE102004042362B3 Integrierter Halbleiterspeicher mit mindestens einer Wortleitung und Verfahren Integrated semiconductor memory having at least one word line and method
03/29/2006EP1640847A2 Dynamic random access memory (DRAM) semiconductor device
03/29/2006EP1639705A2 Circuit for testing and fine tuning integrated circuit (switch control circuit)
03/29/2006EP1639466A1 Failure detection method and device for a cache memory, and corresponding cache memory
03/29/2006EP1639378A1 Memory bus checking procedure
03/29/2006EP1568046B1 Modular test controller with bist circuit for testing embedded dram circuits
03/29/2006CN1754154A Semiconductor test system storing pin calibration data, commands and other data in non-volatile memory
03/29/2006CN1754101A Method and apparatus for detecting an unused state in a semiconductor circuit
03/29/2006CN1248236C Semiconductor memory
03/28/2006US7020835 Enhancements to data integrity verification mechanism
03/28/2006US7020820 Instruction-based built-in self-test (BIST) of external memory
03/28/2006US7020819 Semiconductor integrated circuit with local monitor circuits
03/28/2006US7020815 Memory technology test apparatus
03/28/2006US7020806 Method for testing memory units to be tested and test device
03/28/2006US7020759 Device and method for associating information concerning memory cells of a memory with an external memory
03/28/2006US7020739 Memory controller, flash memory system having memory controller and method for controlling flash memory device
03/28/2006US7020571 Automated test method