| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
|---|
| 07/13/2006 | US20060156189 Method for copying data in reprogrammable non-volatile memory |
| 07/13/2006 | US20060156136 System for storing device test information on a semiconductor device using on-device logic for determination of test results |
| 07/13/2006 | US20060156126 Semiconductor test instrument |
| 07/13/2006 | US20060156095 Fault detecting method and layout method for semiconductor integrated circuit |
| 07/13/2006 | US20060156094 Interleaving/de-interleaving using compressed bit-mapping sequences |
| 07/13/2006 | US20060156093 Synchronous memory interface with test code input |
| 07/13/2006 | US20060156092 Memory technology test apparatus |
| 07/13/2006 | US20060156091 Methods and apparatus for testing a memory |
| 07/13/2006 | US20060156090 Memory array manufacturing defect detection system and method |
| 07/13/2006 | US20060156089 Method and apparatus utilizing defect memories |
| 07/13/2006 | US20060156088 Method and BIST architecture for fast memory testing in platform-based integrated circuit |
| 07/13/2006 | US20060156081 Semiconductor component test procedure, as well as a data buffer component |
| 07/13/2006 | US20060155966 Processor including a register file and method for computing flush masks in a multi-threaded processing system |
| 07/13/2006 | US20060155923 Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices |
| 07/13/2006 | US20060155884 Apparatus and method for selectively configuring a memory device using a bi-stable relay |
| 07/13/2006 | US20060155882 Integrity control for data stored in a non-volatile memory |
| 07/13/2006 | US20060152985 Output power testing apparatus for memory |
| 07/13/2006 | US20060152984 Memory component and addressing of memory cells |
| 07/13/2006 | US20060152395 Integrated circuit with embedded identification code |
| 07/13/2006 | DE69534527T2 Verfahren zur Verwendung von nicht-aneinandergrenzenden reservierten Speicherplatz zur Datenmigration in einem hierarchischen redundanten Datenspeichersystem A process for the use of non-contiguous allocated space for data migration in a redundant hierarchic data storage system |
| 07/13/2006 | DE19947441B4 Prüfsystem für elektrische Teile Testing system for electrical parts |
| 07/13/2006 | DE19928981B4 Vorrichtung und Verfahren zum Testen von Halbleiterspeichern Apparatus and method for testing semiconductor memories |
| 07/13/2006 | DE19912417B4 IC-Testgerät IC tester |
| 07/13/2006 | DE102005000841A1 Integrierter Halbleiterspeicher mit Anpassung des Bewertungsverhaltens von Leseverstärkern Integrated semiconductor memory with adjustment of the evaluation behavior of sense amplifiers |
| 07/12/2006 | EP1679721A2 Method for operating a NROM memory device |
| 07/12/2006 | CN1802708A IC device comprising test circuit for measuring AC characteristic of internal memory macro |
| 07/12/2006 | CN1801395A Method for repairing and running storage devices |
| 07/12/2006 | CN1264219C Synchronous semiconductor memory device |
| 07/11/2006 | US7076723 Error correction codes |
| 07/11/2006 | US7076722 Semiconductor memory device |
| 07/11/2006 | US7076714 Memory tester uses arbitrary dynamic mappings to serialize vectors into transmitted sub-vectors and de-serialize received sub-vectors into vectors |
| 07/11/2006 | US7076710 Non-binary address generation for ABIST |
| 07/11/2006 | US7076705 Semiconductor integrated circuit having bonding optional function |
| 07/11/2006 | US7076703 Method and system for defining a redundancy window around a particular column in a memory array |
| 07/11/2006 | US7076702 Memory with element redundancy |
| 07/11/2006 | US7076701 Recording medium having spare area for defect management and information on defect management, and method of allocating spare area and method of managing defects |
| 07/11/2006 | US7076700 Method for reconfiguring a memory |
| 07/11/2006 | US7076699 Method for testing semiconductor devices having built-in self repair (BISR) memory |
| 07/11/2006 | US7076697 Method and apparatus for monitoring component latency drifts |
| 07/11/2006 | US7076667 Storage device having secure test process |
| 07/11/2006 | US7076618 Memory controllers with interleaved mirrored memory modes |
| 07/11/2006 | US7076376 System and method for calibrating weak write test mode (WWTM) |
| 07/11/2006 | US7075854 Semiconductor memory device, write control circuit and write control method for the same |
| 07/11/2006 | US7075851 Semiconductor memory device inputting/outputting data and parity data in burst operation |
| 07/11/2006 | US7075848 Redundancy circuit in semiconductor memory device having a multiblock structure |
| 07/11/2006 | US7075846 Apparatus for interleave and method thereof |
| 07/11/2006 | US7075839 Semiconductor memory device |
| 07/11/2006 | US7075838 Semiconductor device and test method of testing the same |
| 07/11/2006 | US7075837 Redundancy relieving circuit |
| 07/11/2006 | US7075836 Semiconductor memory having testable redundant memory cells |
| 07/11/2006 | US7075835 Redundancy control circuit which surely programs program elements and semiconductor memory using the same |
| 07/11/2006 | US7075834 Semiconductor integrated circuit device |
| 07/11/2006 | US7075833 Circuit for detecting negative word line voltage |
| 07/11/2006 | US7075822 High bandwidth datapath load and test of multi-level memory cells |
| 07/11/2006 | US7075325 Method and apparatus for testing semiconductor devices using an actual board-type product |
| 07/11/2006 | US7075127 Single-poly 2-transistor based fuse element |
| 07/06/2006 | US20060150063 Error detection and correction method and system for memory devices |
| 07/06/2006 | US20060150062 Method and system for correcting soft errors in memory circuit |
| 07/06/2006 | US20060149996 Techniques for storing accurate operating current values |
| 07/06/2006 | US20060149500 Semiconductor device having a mode of functional test |
| 07/06/2006 | US20060149490 Calibration circuit of a semiconductor memory device and method of operating the same |
| 07/06/2006 | US20060146622 Performing memory built-in-self-test (MBIST) |
| 07/06/2006 | US20060146621 Difference signal path test and characterization circuit |
| 07/06/2006 | US20060146620 Semiconductor memory having a spare memory cell |
| 07/06/2006 | US20060146586 Semiconductor memory device |
| 07/06/2006 | DE19730958B4 Halbleiterspeichervorrichtung A semiconductor memory device |
| 07/06/2006 | DE112004001527T5 Verfahren und Lasersysteme zur Verbindungsbearbeitung unter Verwendung von Laserimpulsen mit speziell zugeschnittenen Leistungsprofilen The method and laser systems for call processing using laser pulses with specially tailored power profiles |
| 07/06/2006 | DE102004061549A1 System zum Testen von Halbleiter-Bauelementen A system for testing semiconductor devices |
| 07/06/2006 | DE102004060368A1 Error code generation method involves recording and scanning of data sequence and error correction data and generation of error code from determined bit error and bit is modified in its content for data sequence depending on control signal |
| 07/06/2006 | DE10058464B4 Mustererzeugungsverfahren, dieses verwendender Mustergenerator, und diesen Mustergenerator verwendendes Speichertestgerät Pattern forming method using this Direction pattern generator, and this pattern generator-use memory tester |
| 07/05/2006 | EP1476873A4 Removable memory media with integral indicator light |
| 07/05/2006 | CN1799104A Integrity control for data stored in a non-volatile memory |
| 07/05/2006 | CN1797953A Method and apparatus for timing adjustment |
| 07/05/2006 | CN1797706A Semiconductor device producing system and method |
| 07/05/2006 | CN1797705A Semiconductor device producing system and method |
| 07/05/2006 | CN1797610A System for displaying residual capacity connected to external data storage device |
| 07/05/2006 | CN1797604A Calibration circuit of a semiconductor memory device and method of operation the same |
| 07/05/2006 | CN1797360A System and method for testing reliability of memory |
| 07/05/2006 | CN1263136C Nonvolatile semiconductor memory |
| 07/04/2006 | US7073115 Correcting multiple block data loss in a storage array using a combination of a single diagonal parity group and multiple row parity groups |
| 07/04/2006 | US7073112 Compilable address magnitude comparator for memory array self-testing |
| 07/04/2006 | US7073106 Test method for guaranteeing full stuck-at-fault coverage of a memory array |
| 07/04/2006 | US7073105 ABIST address generation |
| 07/04/2006 | US7073104 Method and system for applying testing voltage signal |
| 07/04/2006 | US7073103 Smart verify for multi-state memories |
| 07/04/2006 | US7073102 Reconfiguration device for faulty memory |
| 07/04/2006 | US7073101 Method of testing memory with continuous, varying data |
| 07/04/2006 | US7073100 Method for testing embedded DRAM arrays |
| 07/04/2006 | US7072930 Binary counter |
| 07/04/2006 | US7072923 Method and apparatus for generating deterministic, non-repeating, pseudo-random addresses |
| 07/04/2006 | US7072241 Semiconductor memory device and multi-chip module comprising the semiconductor memory device |
| 07/04/2006 | US7072239 Method and circuit for locating anomalous memory cells |
| 07/04/2006 | US7072233 Method and apparatus for optimizing the functioning of DRAM memory elements |
| 07/04/2006 | US7072221 Flash memory device and method for driving the same |
| 07/04/2006 | US7071724 Wafer probecard interface |
| 07/04/2006 | US7071719 Semiconductor device |
| 07/04/2006 | US7071676 Circuit configuration and method for measuring at least one operating parameter for an integrated circuit |
| 07/04/2006 | US7071489 Silicon plate and solar cell |
| 06/29/2006 | WO2006069235A1 Erased sector detection mechanisms |
| 06/29/2006 | WO2006066946A1 Internal column counter for testing a memory in a compression test mode and method of operation thereof |