| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 05/24/2006 | EP1658619A2 Hub module for connecting one or more memory devices |
| 05/24/2006 | EP0987717B1 Method and apparatus for testing dynamic random access memory |
| 05/24/2006 | EP0836196B1 Improvements in or relating to non-volatile memory devices |
| 05/24/2006 | DE102004057772B3 Insertable calibration device for programmable tester programs transmission time point so occurrences of calibration signal edge and reference signal edge essentially coincide to compensate for signal transition time differences |
| 05/24/2006 | DE102004056214A1 Memory buffer for memory module, has memory-sided bus system and redundancy memory between which bus signal is transmitted and redirected on basis of comparison of memory cell addresses |
| 05/24/2006 | DE102004055466A1 Device for measuring memory cell current esp. from non-volatile stores, includes current mirror device for mirroring current during readout of memory cell |
| 05/24/2006 | DE102004054968A1 Memory e.g. dynamic random access memory, component repairing method, involves programming word control-address decoder and controller in a manner that read/write access takes place in memory cells to cause common readout or write of cells |
| 05/24/2006 | DE102004054874A1 Electronic circuit arrangement with volatile memory element e.g. DRAM, includes volatile and non-volatile memory units designed as single electronic module storing repair information for volatile unit |
| 05/24/2006 | DE102004026800B4 Verfahren zum Verändern einer Tiefe einer Interleaver-Vorrichtung oder Deinterleaver-Vorrichtung sowie entsprechende Interleaver-Vorrichtung, Deinterleaver-Vorrichtung und Kommunikationseinrichtung A method for changing a depth of interleaver device or deinterleaver device and corresponding interleaver device, deinterleaver device and communication device |
| 05/24/2006 | CN1257552C 半导体器件 Semiconductor devices |
| 05/23/2006 | US7051265 Systems and methods of routing data to facilitate error correction |
| 05/23/2006 | US7051264 Error correcting memory and method of operating same |
| 05/23/2006 | US7051262 Method for processing error code of compressed image in transmission |
| 05/23/2006 | US7051261 Turbo encoder with reduced processing delay |
| 05/23/2006 | US7051260 Data storing method of dynamic RAM and semiconductor memory device |
| 05/23/2006 | US7051253 Pseudo fail bit map generation for RAMS during component test and burn-in in a manufacturing environment |
| 05/23/2006 | US7051151 Integrated circuit buffer device |
| 05/23/2006 | US7050349 Semiconductor integrated circuit device and semiconductor memory device reprogrammable after assembly |
| 05/23/2006 | US7050347 Semiconductor memory |
| 05/23/2006 | US7050343 Built-in testing methodology in flash memory |
| 05/23/2006 | US7050342 Testmode to increase acceleration in burn-in |
| 05/23/2006 | US7050332 Nonvolatile register and semiconductor device |
| 05/18/2006 | WO2006052929A1 Adaptive memory calibration using bins |
| 05/18/2006 | WO2006052321A2 System and method of reading non-volatile computer memory |
| 05/18/2006 | WO2006051666A1 Test equipment and test method of semiconductor memory having a plurality of banks |
| 05/18/2006 | US20060107185 Recording medium having spare area for defect management and information on defect management, and method of allocating spare area and method of managing defects |
| 05/18/2006 | US20060107160 Method and apparatus for optimized parallel testing and access of electronic circuits |
| 05/18/2006 | US20060107136 Smart verify for multi-state memories |
| 05/18/2006 | US20060107135 Row-diagonal parity technique for enabling efficient recovery from double failures in a storage array |
| 05/18/2006 | US20060107134 Test apparatus for semiconductor memory device |
| 05/18/2006 | US20060107133 Tampering-protected microprocessor system and operating procedure for same |
| 05/18/2006 | US20060107132 System and method for testing a memory for a memory failure exhibited by a failing memory |
| 05/18/2006 | US20060107131 Multi-platter disk drive controller and methods for synchronous redundant data operations |
| 05/18/2006 | US20060107130 System and method of reading non-volatile computer memory |
| 05/18/2006 | US20060107129 Method and computer program product for marking errors in BIOS on a RAID controller |
| 05/18/2006 | US20060104135 Data receiving apparatus and control method thereof |
| 05/18/2006 | US20060104134 Semiconductor memory devices incorporating voltage level shifters for controlling a VPP voltage level independently and methods of operating the same |
| 05/18/2006 | US20060104133 Reliability test method for a ferroelectric memory device |
| 05/18/2006 | DE60021129T2 Verfahren und Vorrichtung zur Prüfung einer elektronischen Vorrichtung Method and apparatus for testing an electronic device |
| 05/18/2006 | DE10358038B4 Integrierte Schaltung zur Speicherung von Betriebsparametern An integrated circuit for storage of operating parameters |
| 05/18/2006 | DE102005054464A1 Dynamic random access memory semiconductor memory device, has pre-charger circuits connected between different pairs of bit lines, and two bit lines in each bit line pair connected to different pre-charge circuits |
| 05/18/2006 | DE10148904B4 Vorrichtung und Verfahren zur Steuerung der Abtastverstärkerfreigabe in einem Halbleiterspeicherbauelement Apparatus and method for controlling the Abtastverstärkerfreigabe in a semiconductor memory device |
| 05/18/2006 | CA2586537A1 Adaptive memory calibration using bins |
| 05/17/2006 | EP1657724A1 Apparatus and methods for tuning a memory interface |
| 05/17/2006 | EP1657723A1 Semiconductor memory and operation method of semiconductor memory |
| 05/17/2006 | CN1774700A Data pickup processing method for logic analyzer and apparatus thereof |
| 05/17/2006 | CN1774641A Test apparatus |
| 05/17/2006 | CN1256733C IC test software system for mapping logical functional data of logic integrated circuits to physical representation |
| 05/16/2006 | US7047478 Multipurpose method for constructing an error-control code for multilevel memory cells operating with a variable number of storage levels, and multipurpose error-control method using said error-control code |
| 05/16/2006 | US7047476 Code error corrector |
| 05/16/2006 | US7047468 Method and apparatus for low overhead circuit scan |
| 05/16/2006 | US7047466 Apparatus and method for programmable fuse repair to support dynamic relocate and improved cache testing |
| 05/16/2006 | US7047461 Semiconductor integrated circuit device with test data output nodes for parallel test results output |
| 05/16/2006 | US7047460 Method and apparatus for testing a storage interface |
| 05/16/2006 | US7047458 Testing methodology and apparatus for interconnects |
| 05/16/2006 | US7047455 Memory with element redundancy |
| 05/16/2006 | US7047454 Integrated circuit having a data processing unit and a buffer memory |
| 05/16/2006 | US7047381 System and method for providing one-time programmable memory with fault tolerance |
| 05/16/2006 | US7046574 Memory system |
| 05/16/2006 | US7046563 Parallel compression test circuit of memory device |
| 05/16/2006 | US7046562 Integrated circuit reset circuitry |
| 05/16/2006 | US7046560 Reduction of fusible links and associated circuitry on memory dies |
| 05/16/2006 | US7046559 Semiconductor memory device capable of erasing or writing data in one bank while reading data from another bank |
| 05/16/2006 | US7046555 Methods for identifying non-volatile memory elements with poor subthreshold slope or weak transconductance |
| 05/11/2006 | US20060098506 Semiconductor memory device capable of storing data of various patterns and method of electrically testing the semiconductor memory device |
| 05/11/2006 | US20060098505 Failure test method for split gate flash memory |
| 05/11/2006 | US20060098504 Semiconductor memory |
| 05/11/2006 | US20060098503 Apparatus and method for repairing semiconductor memory device |
| 05/11/2006 | US20060098484 Memory block quality identification in a memory device |
| 05/11/2006 | DE10034855B4 System zum Test von schnellen integrierten Digitalschaltungen und BOST-Halbleiterschaltungsbaustein als Testschaltkreis A system for fast test of integrated digital circuits and BOST semiconductor circuit block as the test circuit |
| 05/10/2006 | CN1771566A Memory bit line leakage repair |
| 05/10/2006 | CN1771565A Semiconductor memory and operation method of semiconductor memory |
| 05/10/2006 | CN1770318A Semiconductor memory device and method for testing same |
| 05/10/2006 | CN1770312A Integrated circuit memory devices that support detection of write errors occuring during power failures and methods of operating same |
| 05/10/2006 | CN1255818C Storage circuit with odd-even check unit array |
| 05/10/2006 | CN1255817C Semiconductor integrated circuit comprising storage macro |
| 05/10/2006 | CN1255815C Thin film magnetic memory with redundant structure |
| 05/09/2006 | US7043679 Piggybacking of ECC corrections behind loads |
| 05/09/2006 | US7043673 Content addressable memory with priority-biased error detection sequencing |
| 05/09/2006 | US7043672 Layout for a semiconductor memory device having redundant elements |
| 05/09/2006 | US7043652 Calibration method and memory system |
| 05/09/2006 | US7043392 Interpolator testing system |
| 05/09/2006 | US7043384 Failure detection system, failure detection method, and computer program product |
| 05/09/2006 | US7043382 Low voltage swing bus analysis method using static timing analysis tool |
| 05/09/2006 | US7042800 Method and memory system in which operating mode is set using address signal |
| 05/09/2006 | US7042790 Semiconductor device, sales method for semiconductor device, sales system for semiconductor device and program product storing sales program for semiconductor device |
| 05/09/2006 | US7042785 Method and apparatus for controlling refresh cycles of a plural cycle refresh scheme in a dynamic memory |
| 05/09/2006 | US7042780 Semiconductor integrated circuit and method for detecting soft defects in static memory cell |
| 05/09/2006 | US7042778 Flash array implementation with local and global bit lines |
| 05/09/2006 | US7042773 Integrated circuit for storing operating parameters |
| 05/09/2006 | US7042772 Methods and circuits for programming of a semiconductor memory cell and memory array using a breakdown phenomenon in an ultra-thin dielectric |
| 05/09/2006 | US7042770 Memory devices with page buffer having dual registers and method of using the same |
| 05/09/2006 | US7042206 Integrated circuit and method for operating the integrated circuit |
| 05/04/2006 | WO2006045755A2 Method and device for increasing the availability of a memory unit and memory unit |
| 05/04/2006 | WO2005066780A3 Managing external memory updates for fault detection in redundant multithreading systems using speculative memory support |
| 05/04/2006 | US20060095829 Semiconductor device |
| 05/04/2006 | US20060095817 Buffer for testing a memory module and method thereof |
| 05/04/2006 | US20060095816 Test clocking scheme |
| 05/04/2006 | US20060092755 Semiconductor test apparatus and control method therefor |
| 05/04/2006 | US20060092729 Verifying circuit and method of repairing semiconductor device |