| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 08/29/2006 | US7099191 Channel erase type nonvolatile semiconductor memory device and electronic card and electronic apparatus using the device |
| 08/29/2006 | US7099190 Data storage system |
| 08/29/2006 | US7098696 Logic circuit and semiconductor integrated circuit |
| 08/29/2006 | US7098681 Semiconductor device, method for testing the same and IC card |
| 08/29/2006 | US7098049 Shallow trench isolation void detecting method and structure for the same |
| 08/24/2006 | US20060190864 Efficient modeling of embedded memories in bounded memory checking |
| 08/24/2006 | US20060190780 High reliability memory module with a fault tolerant address and command bus |
| 08/24/2006 | US20060190779 Semiconductor integrated circuit for reducing number of contact pads to be probed in probe test |
| 08/24/2006 | US20060190778 Method for reducing SRAM test time by applying power-up state knowledge |
| 08/24/2006 | US20060187726 Memory bus checking procedure |
| 08/24/2006 | US20060187725 Semiconductor memory device |
| 08/24/2006 | US20060187724 Test for weak sram cells |
| 08/24/2006 | US20060187723 Nonvolatile semiconductor memory device having improved redundancy relieving rate |
| 08/24/2006 | US20060187722 Panel assembly for display device, display device including the same, and repairing method for display device |
| 08/24/2006 | DE102006007326A1 Error correction circuit for dynamic RAM system, has read tree to receive data from data memory and parity data from parity memory, and also configured to produce display, whether error is occurred in data during storage within data memory |
| 08/24/2006 | DE102006004009A1 Prüfdatentopologie-Schreibvorgang in Speicher unter Verwendung von zwischengespeicherten Leseverstärkerdaten und Zeilenadressenverwürfelung Prüfdatentopologie write operation in memory using cached sense amplifier data and row address scrambling |
| 08/24/2006 | DE102005005301A1 Integrierter Halbleiterspeicher Integrated semiconductor memory |
| 08/23/2006 | EP1496519B1 Encoding method and memory apparatus |
| 08/23/2006 | CN2809806Y Ic卡检测仪 Ic card detector |
| 08/23/2006 | CN1823392A Semiconductor storage device |
| 08/23/2006 | CN1823277A Integrated circuit with test pad structure and method of testing |
| 08/23/2006 | CN1822235A Method and system for measurement |
| 08/23/2006 | CN1822222A Semiconductor device employing fuse circuit and method for selecting fuse circuit system |
| 08/23/2006 | CN1822208A Full-stress testable memory device having an open bit line architecture and method of testing the same |
| 08/23/2006 | CN1271638C Semiconductor memory device and redundance judging method |
| 08/22/2006 | US7096472 Systems and methods for ensuring atomicity of processes in a multitasking computing environment |
| 08/22/2006 | US7096407 Technique for implementing chipkill in a memory system |
| 08/22/2006 | US7096406 Memory controller for multilevel cell memory |
| 08/22/2006 | US7096397 Dft technique for avoiding contention/conflict in logic built-in self-test |
| 08/22/2006 | US7096396 Test system for circuits |
| 08/22/2006 | US7096393 Built-in self-test (BIST) of memory interconnect |
| 08/22/2006 | US7096386 Semiconductor integrated circuit having functional modules each including a built-in self testing circuit |
| 08/22/2006 | US7095671 Electrical fuse control of memory slowdown |
| 08/22/2006 | US7095669 Refresh for dynamic cells with weak retention |
| 08/22/2006 | US7095663 Method for analyzing defect of SRAM cell |
| 08/22/2006 | US7095662 Semiconductor memory device having first and second memory cell arrays and a program method thereof |
| 08/22/2006 | US7095661 Semiconductor memory module, memory system, circuit, semiconductor device, and DIMM |
| 08/22/2006 | US7095649 Semiconductor integrated circuit device |
| 08/22/2006 | US7095248 Hardware and software programmable fuses for memory repair |
| 08/17/2006 | WO2006086703A1 System for handling bad storage locations in memory |
| 08/17/2006 | WO2004071065A3 Apparatus and method for accommodating loss of signal |
| 08/17/2006 | US20060184859 Predictive diagnosis of a data read system |
| 08/17/2006 | US20060184858 Memory circuit, such as a DRAM, comprising an error correcting mechanism |
| 08/17/2006 | US20060184846 System and method for managing mirrored memory transactions and error recovery |
| 08/17/2006 | US20060184725 Scratch control memory array in a flash memory device |
| 08/17/2006 | US20060181944 Daisy chained multi-device system and operating method |
| 08/17/2006 | US20060181943 Memory device having open bit line architecture for improving repairability and method of repairing the same |
| 08/17/2006 | US20060181942 Switching a defective signal line with a spare signal line without shutting down the computer system |
| 08/17/2006 | US20060181941 Efficient method of test and soft repair of SRAM with redundancy |
| 08/17/2006 | US20060181932 Device and method for pulse width control in a phase change memory device |
| 08/17/2006 | US20060180278 Fabric light control window covering |
| 08/17/2006 | DE102005061374A1 Speicherbauelement und Reparaturverfahren Memory device and method of repair |
| 08/17/2006 | DE102005005631A1 Memory e.g. Programmable ROM for use in e.g. smart card, has storage areas for storing data e.g. audio/video data, and error codes respectively, where area for codes is reduced so that it is used for data |
| 08/17/2006 | DE102004043050B4 Verfahren, Halbleitervorrichtung und Testsystem zur Loop-back-Vermessung des Interface-Timings von Halbleitervorrichtungen Method, semiconductor device and test system for Loop-back measurement of the interface timing of semiconductor devices |
| 08/16/2006 | EP1690263A1 Data retention indicator for magnetic memories |
| 08/16/2006 | EP1690241A2 System-in-package and method of testing thereof |
| 08/16/2006 | EP1576445A4 Methods and apparatus for improved memory access |
| 08/16/2006 | CN1819199A Semiconductor product with semiconductor substrate and testing structure and method |
| 08/16/2006 | CN1819062A Method and apparatus for providing flexible modular redundancy allocation for memory built in self test of sram with redundancy |
| 08/15/2006 | US7093190 System and method for handling parity errors in a data processing system |
| 08/15/2006 | US7093182 Data redundancy methods and apparatus |
| 08/15/2006 | US7093177 Low-jitter clock for test system |
| 08/15/2006 | US7093176 Programmable test for memories |
| 08/15/2006 | US7093173 Synchronous flash memory with test code input |
| 08/15/2006 | US7093171 Flexible row redundancy system |
| 08/15/2006 | US7093166 Method and apparatus for testing physical memory in an information handling system under conventional operating systems |
| 08/15/2006 | US7093158 Data redundancy in a hot pluggable, large symmetric multi-processor system |
| 08/15/2006 | US7092306 Semiconductor device capable of adjusting operation timing using antifuse |
| 08/15/2006 | US7092303 Dynamic memory and method for testing a dynamic memory |
| 08/15/2006 | US7092302 Nonvolatile semiconductor memory device |
| 08/15/2006 | US7092295 Semiconductor memory device and portable electronic apparatus including the same |
| 08/15/2006 | US7092289 Efficient redundancy system for flash memories with uniformly sized blocks |
| 08/15/2006 | US7091564 Semiconductor chip with fuse unit |
| 08/10/2006 | WO2006083402A2 Toggle memory burst |
| 08/10/2006 | WO2006031261A3 Storage device parity computation |
| 08/10/2006 | US20060179397 Interface for generating an error code |
| 08/10/2006 | US20060179371 Data copy method and application processor for the same |
| 08/10/2006 | US20060179370 Semiconductor memory device in which memory cells are tested using several different test data patterns and method thereof |
| 08/10/2006 | US20060179369 Memory built-in self test engine apparatus and method with trigger on failure and multiple patterns per load capability |
| 08/10/2006 | US20060179368 Method and apparatus for providing flexible modular redundancy allocation for memory built in self test of SRAM with redundancy |
| 08/10/2006 | US20060179367 Method for updating memory |
| 08/10/2006 | US20060176745 Compilable memory structure and test methodology for both asic and foundry test environments |
| 08/10/2006 | US20060176067 Method and system for detecting potential reliability failures of integrated circuit |
| 08/10/2006 | DE102005004379A1 Dynamic random access memory semiconductor storage component functional capability testing method, involves testing functional capability of regular storage area together with redundant storage area, and deactivating defective cells |
| 08/10/2006 | DE102004057483B3 Verfahren zum Testen von Halbleiter-Chips mittels Bitmasken A method of testing semiconductor chips by means of bitmasks |
| 08/09/2006 | CN1815632A Device and method for repairing semiconductor storage |
| 08/09/2006 | CN1815631A Method for intensifying electric erasable programmeable ROM data error correction |
| 08/09/2006 | CN1815624A 半导体器件 Semiconductor devices |
| 08/09/2006 | CN1269140C Semiconductor storing device with remedial circuit |
| 08/09/2006 | CN1269136C Synchronous semiconductor memory apparatus with plurality of memory sets and method for controlling same |
| 08/09/2006 | CN1269135C Semiconductor memory device and its checking method |
| 08/09/2006 | CN1269132C Semiconductor memory redundant circuit |
| 08/09/2006 | CN1269131C Differencial current estimation circuit and reading amplifying circuit |
| 08/09/2006 | CN1269041C Semiconductor integrated circuit and method for testing memorizer |
| 08/08/2006 | US7089465 Multi-port memory device having serial I/O interface |
| 08/08/2006 | US7089375 Device and method for configuring a cache tag in accordance with burst length |
| 08/08/2006 | US7089267 Method and apparatus for file management |
| 08/08/2006 | US7088648 Write-once type optical disc, and method and apparatus for managing defective areas on write-once type optical disc |
| 08/08/2006 | US7088636 Semiconductor memory circuit |
| 08/08/2006 | US7088626 Bias voltage applying circuit and semiconductor memory device |