Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
10/2006
10/03/2006US7117422 Error detection in storage data
10/03/2006US7117421 Transparent error correction code memory system and method
10/03/2006US7117420 Construction of an optimized SEC-DED code and logic for soft errors in semiconductor memories
10/03/2006US7117414 Method for identifying an integrated circuit
10/03/2006US7117410 Distributed failure analysis memory for automatic test equipment
10/03/2006US7117409 Multi-port memory testing method utilizing a sequence folding scheme for testing time reduction
10/03/2006US7117408 Method and system of testing data retention of memory
10/03/2006US7117407 Method for testing a semiconductor memory having a plurality of memory banks
10/03/2006US7117406 Semiconductor memory device and method of testing same
10/03/2006US7117405 Extender card with intercepting EEPROM for testing and programming un-programmed memory modules on a PC motherboard
10/03/2006US7117404 Test circuit for testing a synchronous memory circuit
10/03/2006US7117403 Method and device for generating digital signal patterns
10/03/2006US7117401 Method and apparatus for optimizing timing for a multi-drop bus
10/03/2006US7117400 Memory device with data line steering and bitline redundancy
10/03/2006US7117399 Method of and apparatus for controlling data storage system according to temperature, and medium
10/03/2006US7117394 Built-in self-test circuit
10/03/2006US7117332 Window-based flash memory storage system and management and access methods thereof
10/03/2006US7116604 Semiconductor memory device and method for selecting multiple word lines in a semiconductor memory device
10/03/2006US7116592 Semiconductor device and test method thereof
10/03/2006US7116591 Redundancy circuits and memory devices having a twist bitline scheme and methods of repairing defective cells in the same
10/03/2006US7116582 Nonvolatile semiconductor memory and method of operating the same
10/03/2006US7116570 Access circuit and method for allowing external test voltage to be applied to isolated wells
10/03/2006US7116133 Apparatus and method for adjusting clock skew
10/03/2006US7116127 Circuit with fuse and semiconductor device having the same circuit
09/2006
09/28/2006WO2006101984A2 Internally generating patterns for testing in an integrated circuit device
09/28/2006US20060218471 Optical disc recording/reproduction apparatus
09/28/2006US20060218470 Multiply redundant raid system and XOR-efficient method and apparatus for implementing the same
09/28/2006US20060218469 Low power cost-effective ECC memory system and method
09/28/2006US20060218468 Memory initialization device, memory initialization method, and error correction device
09/28/2006US20060218467 Memory having a portion that can be switched between use as data and use as error correction code (ECC)
09/28/2006US20060218453 System and method for testing a memory for a memory failure exhibited by a failing memory
09/28/2006US20060218452 Area efficient BIST system for memories
09/28/2006US20060218432 Method for the recognition and/or correction of memory access error electronic circuit arrangement for carrying out said method
09/28/2006US20060216927 Methods and systems for processing a device, methods and systems for modeling same and the device
09/28/2006US20060215470 Data compression read mode for memory testing
09/28/2006US20060215469 Semiconductor device and skew adjusting method
09/27/2006EP1704571A1 Non-volatile memory and method with block management system
09/27/2006CN1839545A Circuit for testing and fine tuning integrated circuit (switch control circuit)
09/27/2006CN1838329A Method and apparatus for dynamically concealing memory defect
09/27/2006CN1838328A Method for erasing memory cell on memory array
09/27/2006CN1838327A Semiconductor memory device and semiconductor memory device test method
09/26/2006US7114119 Detecting and correcting errors in data
09/26/2006US7114118 System and method for providing adjustable read margins in a semiconductor memory
09/26/2006US7114117 Memory card and memory controller
09/26/2006US7114113 Test circuit provided with built-in self test function
09/26/2006US7114108 Semiconductor test system and method for effectively testing a semiconductor device having many pins
09/26/2006US7114025 Semiconductor memory having test function for refresh operation
09/26/2006US7113441 Semiconductor memory
09/26/2006US7113435 Data compression read mode for memory testing
09/26/2006US7113434 Semiconductor integrated circuit having programmable delays for generating timing signals with time difference being non-integral multiple of clock cycle
09/26/2006US7113422 Method for optimizing MRAM circuit performance
09/26/2006US7112895 Reduced power consumption in integrated circuits with fuse controlled redundant circuits
09/21/2006WO2006099517A2 Multiply redundant raid system and xor-efficient implementation
09/21/2006US20060212779 Dynamic speed control method for storage device
09/21/2006US20060212778 Hardware based memory scrubbing
09/21/2006US20060212777 Medium storage device and write path diagnosis method
09/21/2006US20060212764 Integrated circuit and method for testing memory on the integrated circuit
09/21/2006US20060209603 Method and apparatus for supporting verification, and computer product
09/21/2006US20060208758 Method and system for detecting a mode of operation of an integrated circuit, and a memory device including same
09/21/2006US20060207975 High-speed, precision, laser-based method and system for processing material of one or more targets within a field
09/21/2006DE4243611B4 Testmodusschaltung für eine Speichervorrichtung Test mode circuit for a memory device
09/21/2006DE102005011893B3 Semiconductor memory component e.g. partial good memory, for use as audio dynamic RAM, has test logic to test component by writing result based on comparison of test-data words along with error free signal and by simulating all-good-memory
09/21/2006DE102005011892A1 Semiconductor memory element has memory cell field with groups of data items with set number of memory cells, has plurality of address lines whereby internal address lines is addressable to transferred binary coded memory address
09/21/2006DE102005011891B3 Semiconductor memory unit e.g. dynamic RAM, has I/O skip unit that is erased, when memory cells assigned to data lines are identified as non-functional, and erased skip unit forces error free signal to PF-signal line
09/21/2006DE102005011874A1 Semiconductor memory element has programmable routing unit, which is connected with data connections and data links whereby each data link is connected with assigned data connection in first programmed state of routing unit
09/21/2006DE102005009360B3 Integrierter Halbleiterspeicher mit aktivierbaren Leseverstärkern Integrated semiconductor memory with activated sense amplifiers
09/21/2006DE102004055466B4 Einrichtung und Verfahren zum Messen von Speicherzell-Strömen Apparatus and method for measuring memory cell currents
09/20/2006EP1702338A2 Robust data duplication and improved update method in a multibit non-volatile memory
09/20/2006EP1461689B1 Method and test device for detecting addressing errors in control devices
09/20/2006CN1836215A Fault tolerant data storage circuit
09/20/2006CN1835125A Apparatus and method for correcting hardware
09/20/2006CN1835119A Semiconductor memory and method for analyzing failure of semiconductor memory
09/20/2006CN1834928A Soft error correction method, memory control apparatus and memory system
09/19/2006US7111227 Methods and systems of using result buffers in parity operations
09/19/2006US7111224 FPGA configuration memory with built-in error correction mechanism
09/19/2006US7111211 Efficient air-flow loop through dual burn-in chambers with removable pattern-generator boards for memory-module environmental testing
09/19/2006US7111210 Accelerated test method for ferroelectric memory device
09/19/2006US7111190 Method and apparatus for reconfigurable memory
09/19/2006US7111140 Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices
09/19/2006US7110322 Memory module including an integrated circuit device
09/19/2006US7110314 Semiconductor memory device and method for initializing the same
09/19/2006US7110307 Semiconductor memory with a data holding circuit having two output terminals
09/19/2006US7110303 Memory cell testing feature
09/19/2006US7110294 Semiconductor memory device
09/19/2006US7110290 Thin film magnetic memory device storing program information efficiently and stably
09/19/2006US7110288 Thin film magnetic memory device having redundant configuration
09/19/2006US7110282 Semiconductor memory device allowing accurate burn-in test
09/14/2006WO2006055862A3 Programmable memory built-in-self-test (mbist) method and apparatus
09/14/2006US20060206770 Non-Volatile Semiconductor Memory With Large Erase Blocks Storing Cycle Counts
09/14/2006US20060206766 System and method for on-board diagnostics of memory modules
09/14/2006US20060206672 System and method for providing one-time programmable memory with fault tolerance
09/14/2006US20060203582 Memory compiler redundancy
09/14/2006US20060203581 Efficient method and computer program for modeling and improving static memory performance across process variations and environmental conditions
09/14/2006US20060203580 Programmable element latch circuit
09/14/2006US20060203579 Device and method for compensating defect in semiconductor memory
09/14/2006US20060203578 Apparatus and method for self-correcting cache using line delete, data logging, and fuse repair correction
09/14/2006US20060202208 Silicon plate, producing method thereof, and solar cell
09/14/2006DE102006000797A1 Schreiben unbeschädigter Daten in einen elektronischen Speicher Write undamaged data in an electronic memory
09/13/2006EP1701359A1 Memory tester with test program branch on error indication
09/13/2006EP1700314A1 Flexible and area efficient column redundancy for non-volatile memories