G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation

Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
11/2006
11/09/2006	US20060250866 Adaptive algorithm for MRAM manufacturing
11/09/2006	US20060250865 Adaptive algorithm for MRAM manufacturing
11/09/2006	US20060250864 Semiconductor memory component and method for testing semiconductor memory components having a restricted memory area (partial good memories)
11/09/2006	US20060250863 Semiconductor memory apparatus and method for writing in the memory
11/09/2006	US20060250844 Systems-On-Chips Including Programmed Memory Cells and Programmable and Erasable Memory Cells
11/09/2006	US20060250163 Apparatus and method for adjusting clock skew
11/09/2006	DE102005063166A1 Non-volatile memory e.g. NAND-type flash memory controls page buffer circuit including page buffers which are connected with data output lines
11/09/2006	DE102005020055A1 Memory circuit module for dynamic RAM-memory chip, has comparison logic comparing data bit in overwritten data bit buffer with data bit in another buffer for verifying, whether burning of fuse component takes place in error-free manner
11/08/2006	EP1720172A1 Semiconductor storage device and redundancy control method for semiconductor storage device
11/08/2006	EP1540510A4 Method and apparatus for managing data integrity of backup and disaster recovery data
11/07/2006	US7134069 Method and apparatus for error detection and correction
11/07/2006	US7134066 Generalized parity stripe data storage array
11/07/2006	US7134063 Apparatus and method for testing on-chip ROM
11/07/2006	US7134059 Pad connection structure of embedded memory devices and related memory testing method
11/07/2006	US7134058 Memory circuit scan arrangement
11/07/2006	US7134043 DVD EDC check system and method without descrambling sector data
11/07/2006	US7133319 Programmable weak write test mode (PWWTM) bias generation having logic high output default mode
11/02/2006	WO2006114879A1 Test system for memory chip in mcp or sip
11/02/2006	US20060248434 Non-systematic coded error correction
11/02/2006	US20060248433 Disk controller architecture to allow on-the-fly error correction and write disruption detection
11/02/2006	US20060248416 Test apparatus and test method
11/02/2006	US20060248415 Memory device having conditioning output data
11/02/2006	US20060248414 Method and system for BitMap Analysis System for high speed testing of memories
11/02/2006	US20060248413 Voltage monitoring test mode and test adapter
11/02/2006	US20060248411 Methods and apparatus for reducing memory errors
11/02/2006	US20060248245 Storage system
11/02/2006	US20060245321 Write-once type optical disc, and method and apparatus for managing defective areas on write-once type optical disc
11/02/2006	US20060245280 Integrated circuit having a non-volatile memory cell transistor as a fuse device
11/02/2006	US20060245279 Redundancy circuit in semiconductor memory device
11/02/2006	US20060244473 Device and method for testing integrated circuit dice in an integrated circuit module
11/02/2006	EP1717818A1 Semiconductor storage device and redundancy method for semiconductor storage device
11/02/2006	EP1717814A1 Semiconductor storage device and semiconductor storage device control method
11/02/2006	EP1717707A1 Moving sectors within a block in a flash memory
11/02/2006	EP1540441A4 Method and apparatus for server share migration and server recovery using hierarchical storage management
11/02/2006	EP1537496A4 Method and apparatus for integrating primary data storage with local and remote data protection
11/02/2006	DE102006011698A1 Speicherelement zum Vermindern von Soft-Errors bei einer Logik Memory element for reducing soft errors in logic
11/02/2006	DE102004054968B4 Verfahren zum Reparieren und zum Betreiben eines Speicherbauelements Method for repairing and operating a memory device
11/02/2006	DE10146185B4 Verfahren zum Betrieb eines Halbleiterspeichers und Halbleiterspeicher A method of operating a semiconductor memory and semiconductor memory
11/01/2006	CN1856842A Memory device
11/01/2006	CN1856841A Nonvolatile semiconductor memory device having protection function for each memory block
11/01/2006	CN1855486A 半导体器件 Semiconductor devices
11/01/2006	CN1855313A Method and apparatus for increasing fuse programming yield through preferred use of duplicate data
11/01/2006	CN1855312A Method for automatically providing repairing position data in the fuse wire component in integrated memory circuit
11/01/2006	CN1855305A Memory module and method for operating a memory module
11/01/2006	CN1855297A Nonvolatile ferroelectric memory device including failed cell correcting circuit
10/2006
10/31/2006	US7131050 Optimized read performance method using metadata to protect against drive anomaly errors in a storage array
10/31/2006	US7131040 Manifold-Distributed Air Flow Over Removable Test Boards in a Memory-Module Burn-In System With Heat Chamber Isolated by Backplane
10/31/2006	US7131039 Repair techniques for memory with multiple redundancy
10/31/2006	US7130230 Systems for built-in-self-test for content addressable memories and methods of operating the same
10/31/2006	US7130229 Interleaved mirrored memory systems
10/31/2006	US7130227 Adjustable timing circuit of an integrated circuit
10/31/2006	US7129768 Fuse circuit
10/26/2006	WO2005112250A3 File download and streaming system
10/26/2006	WO2005082106A3 Built-in self test method and apparatus for jitter transfer, jitter tolerance, and fifo data buffer
10/26/2006	WO2005027098A3 Method of increasing capacity of an optical disc
10/26/2006	US20060242542 Correcting multiple block data loss in a storage array using a combination of a single diagonal parity group and multiple row parity groups
10/26/2006	US20060242541 High reliability memory module with a fault tolerant address and command bus
10/26/2006	US20060242540 System and method for handling write commands to prevent corrupted parity information in a storage array
10/26/2006	US20060242538 Multi-bit nonvolatile ferroelectric memory device having fail cell repair circuit and repair method thereof
10/26/2006	US20060242537 Error detection in a logic device without performance impact
10/26/2006	US20060242521 Built-in self-test arrangement for integrated circuit memory devices
10/26/2006	US20060242510 Apparatus and method for programmable fuse repair to support dynamic relocate and improved cache testing
10/26/2006	US20060242497 Circuit and method for test and repair
10/26/2006	US20060242496 Printer controller having tamper resistant shadow memory
10/26/2006	US20060242495 Memory device having terminals for transferring multiple types of data
10/26/2006	US20060242494 Output data compression scheme using tri-state
10/26/2006	US20060242493 Network processor having cyclic redundancy check implemented in hardware
10/26/2006	US20060242492 Method and apparatus for masking known fails during memory tests readouts
10/26/2006	US20060242491 Method and system for applying patches to a computer program concurrently with its execution
10/26/2006	US20060242490 Method and apparatus for testing a memory device
10/26/2006	US20060242489 Stored data reverification management system and method
10/26/2006	US20060242488 Flash memory device with reduced access time
10/26/2006	US20060242485 Error detection, documentation, and correction in a flash memory device
10/26/2006	US20060242483 Built-in self-testing of multilevel signal interfaces
10/26/2006	US20060242482 Method of and apparatus for managing disc defects using temporary defect management information (TDFL) and temporary defect management information (TDDS), and disc having the TDFL and TDDS
10/26/2006	US20060242481 Method of and apparatus for managing disc defects using temporary defect management information (TDFL) and temporary defect management information (TDDS), and disc having the TDFL and TDDS
10/26/2006	US20060242480 Method of and apparatus for managing disc defects using temporary defect management information (TDFL) and temporary defect management information (TDDS), and disc having the TDFL and TDDS
10/26/2006	US20060242479 Method and apparatus for managing disc defects using updateable dma, and disc thereof
10/26/2006	US20060242476 Pre-emptive interleaver address generator for turbo decoders
10/26/2006	US20060239111 Non-volatile semiconductor device and method for automatically recovering erase failure in the device
10/26/2006	US20060239103 Semiconductor memory circuit
10/26/2006	US20060239091 Using redundant memory for extra features
10/26/2006	US20060239090 Semiconductor memory device
10/26/2006	US20060239089 Non-volatile semiconductor device for use in memory card and memory system
10/26/2006	US20060239088 Method and apparatus for increasing fuse programming yield through preferred use of duplicate data
10/26/2006	US20060239055 DRAM stacked package, DIMM, and semiconductor manufacturing method
10/26/2006	US20060237798 Semiconductor chip with fuse unit
10/25/2006	EP1440372B1 Multibit package error correction with non-restricted double bit error detection
10/25/2006	CN1853241A Methods for identifying non-volatile memory elements with poor subthreshold slope or weak transconductance
10/25/2006	CN1851827A Flash storage data access method
10/25/2006	CN1851826A Random storage failure detection processing method and its system
10/24/2006	US7127657 System and method for processing digital data while buffering digital data in a buffer memory
10/24/2006	US7127650 Test method and test device for electronic memories
10/24/2006	US7127647 Apparatus, method, and system to allocate redundant components
10/24/2006	US7127640 On-chip testing of embedded memories using Address Space Identifier bus in SPARC architectures
10/24/2006	US7127478 Data base for persistent data
10/24/2006	US7126865 Memory device including parallel test circuit
10/24/2006	US7126851 Method of transferring initially-setting data in a non-volatile semiconductor memory
10/24/2006	US7126845 Memory device capable of performing high speed reading while realizing redundancy replacement
10/24/2006	US7126836 Semiconductor device, system device using it, and manufacturing method of a semiconductor device

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