| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 01/11/2007 | US20070008534 Systems and methods for distinguishing reflections of multiple laser beams for calibration for semiconductor structure processing |
| 01/11/2007 | US20070007941 Apparatus for improving stability and lock time for synchronous circuits |
| 01/11/2007 | US20070007536 Thin film magnetic memory device capable of conducting stable data read and write operations |
| 01/11/2007 | DE69735918T2 Verbesserungen bei oder in Bezug auf nichtflüchtige Speicheranordnungen Improvements in or relating to non-volatile memory devices |
| 01/11/2007 | DE19957124B4 Verfahren zum Testen von Speicherzellen Hysteresekurve A method of testing memory cells hysteresis curve |
| 01/11/2007 | DE19923243B4 Halbleiterprüfsystem Semiconductor test system |
| 01/11/2007 | DE112004001781T5 Schaltung, System und Verfahren zum Codieren von in einem nichtflüchtigen Speicherarray zu speichernden Daten Circuit, system and method of encoding to be stored in a nonvolatile memory array data |
| 01/11/2007 | DE102005032514B3 Speicher und Verfahren zum Betrieb des Speichers Memory and method of operation of the memory |
| 01/10/2007 | EP1742229A2 A built-in self-repairable memory |
| 01/10/2007 | EP1742228A1 Semiconductor memory with redundant rows and columns and a flexible redundancy architecture |
| 01/10/2007 | EP1742074A1 Test device and test method |
| 01/10/2007 | EP1547094B1 Method and circuitry for identifying weak bits in an mram |
| 01/10/2007 | EP1218821A4 Improved memory integrity for meters |
| 01/10/2007 | CN1894752A 半导体装置 Semiconductor device |
| 01/10/2007 | CN1892916A 半导体集成电路器件 The semiconductor integrated circuit device |
| 01/10/2007 | CN1892915A 半导体存储器器件 Semiconductor memory device |
| 01/10/2007 | CN1892611A Reducing false positives in configuration error detection for programmable devices |
| 01/09/2007 | US7162681 Information reproducing apparatus, method of correcting reproducing program, and information recording medium |
| 01/09/2007 | US7162672 Multilevel signal interface testing with binary test apparatus by emulation of multilevel signals |
| 01/09/2007 | US7162671 Semiconductor integrated circuit device, method of testing semiconductor integrated circuit device and method of manufacturing semiconductor integrated circuit device |
| 01/09/2007 | US7162669 Apparatus and method for compressing redundancy information for embedded memories, including cache memories, of integrated circuits |
| 01/09/2007 | US7162668 Memory with element redundancy |
| 01/09/2007 | US7162663 Test system and method for testing memory circuits |
| 01/09/2007 | US7162660 Semiconductor memory and method of testing the same |
| 01/09/2007 | US7162625 System and method for testing memory during boot operation idle periods |
| 01/09/2007 | US7162549 Multimode controller for intelligent and “dumb” flash cards |
| 01/09/2007 | US7162382 Apparatus and method for calibrating signals |
| 01/09/2007 | US7161866 Memory device tester and method for testing reduced power states |
| 01/09/2007 | US7161865 Semiconductor device |
| 01/09/2007 | US7161857 Memory redundancy programming |
| 01/09/2007 | US7161407 Fuse circuit with controlled fuse burn out and method thereof |
| 01/09/2007 | US7161368 Semiconductor component with internal heating |
| 01/04/2007 | WO2007002324A2 An integrated memory core and memory interface circuit |
| 01/04/2007 | WO2007001852A1 Method and apparatus for programming a memory array |
| 01/04/2007 | WO2007001260A1 Test cells for semiconductor yield improvement |
| 01/04/2007 | WO2006058892B1 Memory system with sector buffers |
| 01/04/2007 | WO2005072305A3 Efficient modeling of embedded memories in bounded memory checking |
| 01/04/2007 | US20070006057 Semiconductor memory chip and method of protecting a memory core thereof |
| 01/04/2007 | US20070006055 Method for expediting defect detection and burning |
| 01/04/2007 | US20070006031 Testing apparatus and testing method |
| 01/04/2007 | US20070005897 Intergrated circuit and a method of cache remapping |
| 01/04/2007 | US20070002649 Area efficient memory architecture with decoder self test and debug capability |
| 01/04/2007 | US20070002648 Semiconductor memory device |
| 01/04/2007 | US20070002647 Semiconductor memory |
| 01/04/2007 | US20070002646 Apparatus and method for repairing a semiconductor memory |
| 01/03/2007 | EP1738375A1 Method for detecting resistive-open defects in semiconductor memories |
| 01/03/2007 | EP1738188A2 Remote bist for high speed test and redundancy calculation |
| 01/03/2007 | EP0762266B1 Mass storage disk array device for use in computer systems |
| 01/03/2007 | CN1890616A Voltage trimming circuit |
| 01/03/2007 | CN1889192A Semiconductor memory and burn-in test method of semiconductor memory |
| 01/02/2007 | US7159165 Optical recording medium, data recording or reproducing apparatus and data recording or reproducing method used by the data recording or reproducing apparatus |
| 01/02/2007 | US7159158 System and method for reading data stored in a semiconductor device having multilevel memory cells |
| 01/02/2007 | US7159157 Apparatus and method for testing a device for storing data |
| 01/02/2007 | US7159156 Memory chip with test logic taking into consideration the address of a redundant word line and method for testing a memory chip |
| 01/02/2007 | US7159145 Built-in self test system and method |
| 01/02/2007 | US7159141 Repairable block redundancy scheme |
| 01/02/2007 | US7159092 Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same |
| 01/02/2007 | US7159069 Simultaneous external read operation during internal programming in a flash memory device |
| 01/02/2007 | US7158433 Semiconductor storage device and method of controlling refreshing of semiconductor storage device |
| 01/02/2007 | US7158426 Method for testing an integrated semiconductor memory |
| 01/02/2007 | US7158425 System and method for providing a redundant memory array in a semiconductor memory integrated circuit |
| 01/02/2007 | US7158418 Non-volatile memory device capable of changing increment of program voltage to mode of operation |
| 01/02/2007 | US7158412 On-chip EE-PROM programming waveform generation |
| 12/28/2006 | US20060294449 Storage device that transfers block data containing actual data and check code from storage device to host computer |
| 12/28/2006 | US20060294441 Logic analyzer data retrieving circuit and its retrieving method |
| 12/28/2006 | US20060294440 Apparatus and method for using a single bank of eFuses to successively store testing data from multiple stages of testing |
| 12/28/2006 | US20060291308 Test method and test program for semiconductor storage device, and semiconductor storage device |
| 12/28/2006 | US20060291307 Semiconductor memory and burn-in test method of semiconductor memory |
| 12/28/2006 | US20060291305 Semiconductor device and program data redundancy method therefor |
| 12/28/2006 | US20060291304 Method for enhanced block management |
| 12/28/2006 | US20060291303 Method and apparatus for programming a memory array |
| 12/28/2006 | US20060289978 Memory element conducting structure |
| 12/28/2006 | DE4345320B4 Platten-Array-Vorrichtung Disk array device |
| 12/28/2006 | DE102006025108A1 Direktzugriffsspeicher mit ECC Random access memory with ECC |
| 12/28/2006 | DE102006025067A1 Halbleiterspeicherbauelement und Verfahren zum Lesen und Schreiben von Daten The semiconductor memory device and method for reading and writing data |
| 12/28/2006 | DE102006021363A1 Memory device e.g. dynamic RAM, for e.g. personal computer, has error correcting code modules attached at controller, where memory modules are operated synchronously with corresponding error correcting code modules by controller |
| 12/28/2006 | DE10119869B4 Schaltungsanordnung und Verfahren zum selektiven Übertragen von Informationen zu Chips auf einem Wafer Circuit arrangement and method for selectively transferring information to chips on a wafer |
| 12/27/2006 | EP1736995A1 Check method of temporary storage circuit in electronic control unit |
| 12/27/2006 | EP1735795A2 Method and apparatus for protecting parts of a packet in a wireless network |
| 12/27/2006 | CN1886804A Data retention indicator for magnetic memories |
| 12/27/2006 | CN1886668A Identifying process and temperature of silicon chips |
| 12/27/2006 | CN1292481C System combined semiconductor device |
| 12/27/2006 | CN1292434C Method and apparatus for creating defect processing information in recording medium |
| 12/27/2006 | CN1292326C Electricity saving controlling circuit in electronic equipment and method for saving electricity |
| 12/26/2006 | US7155659 Error detection and correction circuit |
| 12/26/2006 | US7155645 System and method for testing memory while an operating system is active |
| 12/26/2006 | US7155644 Automatic test entry termination in a memory device |
| 12/26/2006 | US7155643 Semiconductor integrated circuit and test method thereof |
| 12/26/2006 | US7155642 Interleaver for a turbo encoder in an UMTS and method for performing interleaving |
| 12/26/2006 | US7155637 Method and apparatus for testing embedded memory on devices with multiple processor cores |
| 12/26/2006 | US7155357 Method and apparatus for detecting an unused state in a semiconductor circuit |
| 12/26/2006 | US7154835 Digital signal processing method, data recording and reproducing apparatus, and data recording medium that are resistant to burst errors |
| 12/26/2006 | US7154810 Synchronous controlled, self-timed local SRAM block |
| 12/26/2006 | US7154809 Method for measuring the delay time of a signal line |
| 12/26/2006 | US7154808 Semiconductor memory device for simultaneously testing blocks of cells |
| 12/26/2006 | US7154807 Semiconductor memory storage device and its control method |
| 12/26/2006 | US7154805 Storage device employing a flash memory |
| 12/26/2006 | US7154803 Redundancy scheme for a memory integrated circuit |
| 12/26/2006 | US7154802 Semiconductor memory device capable of operating at high speed and with low power consumption while ensuring reliability of memory cell |
| 12/26/2006 | US7154794 Memory regulator system with test mode |