| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
|---|
| 01/30/2007 | US7170804 Test mode for detecting a floating word line |
| 01/30/2007 | US7170803 Current reduction circuit of semiconductor device |
| 01/30/2007 | US7170802 Flexible and area efficient column redundancy for non-volatile memories |
| 01/30/2007 | US7170801 Method for replacing defects in a memory and apparatus thereof |
| 01/30/2007 | US7170781 Multi-bit-per-cell flash EEPROM memory with refresh |
| 01/25/2007 | WO2007011677A1 Apparatus, system and method for accessing persistent files in non-execute-in-place flash memory |
| 01/25/2007 | WO2007010734A1 Semiconductor apparatus and method of testing semiconductor apparatus |
| 01/25/2007 | WO2006078418A3 Error protecting groups of data words |
| 01/25/2007 | US20070022360 Method and apparatus to lower operating voltages for memory arrays using error correcting codes |
| 01/25/2007 | US20070022359 Data storage device and data processing method |
| 01/25/2007 | US20070022335 Methods and apparatus for interfacing between test system and memory |
| 01/25/2007 | US20070022334 Semiconductor device, test board for testing the same, and test system and method for testing the same |
| 01/25/2007 | US20070022333 Testing of interconnects associated with memory cards |
| 01/25/2007 | US20070022330 Redundant column read in a memory array |
| 01/25/2007 | US20070021963 Data management method for slash memory medium |
| 01/25/2007 | US20070020785 Systems and methods for alignment of laser beam(s) for semiconductor link processing |
| 01/25/2007 | US20070018677 Methods for wafer level burn-in |
| 01/25/2007 | DE112004002678T5 2-Transistoren-Schmelzsicherungselement mit einzelner Polysiliziumschicht 2 transistors fuse element with single polysilicon layer |
| 01/25/2007 | DE102006024434A1 Integrierter Schaltungschip mit einer über eine zweite Verzögerungsschaltung abgeglichenen ersten Verzögerungsschaltung und Verfahren zum Einstellen einer Verzögerungszeit Integrated circuit chip having a balanced via a second delay circuit said first delay circuit and method for adjusting a delay time |
| 01/25/2007 | DE102006022959A1 Memory card apparatus for memory capacity updating system, updates available memory capacity information according to occurrence of bad memory in memory and translates updated available memory capacity information to host device |
| 01/25/2007 | DE102005041275A1 Spalten-Redundanz-Wiederverwendung in Speichereinrichtungen Column redundancy reuse in memory devices |
| 01/25/2007 | DE10115880B4 Testschaltung zum kritischen Testen einer synchronen Speicherschaltung Test circuit for critical testing a synchronous memory circuit |
| 01/24/2007 | EP1746606A2 Memory circuit having parity cell array |
| 01/24/2007 | EP1745489A1 Compression of data traces for an integrated circuit with multiple memories |
| 01/24/2007 | EP1185985B1 Method and integrated circuit for bit line soft programming (blisp) |
| 01/24/2007 | CN1902713A Flexible and area efficient column redundancy for non-volatile memories |
| 01/24/2007 | CN1902592A Data storage array |
| 01/24/2007 | CN1902581A Managing external memory updates for fault detection in redundant multithreading systems using speculative memory support |
| 01/24/2007 | CN1901093A Redundancy selector circuit for use in non-volatile memory device |
| 01/24/2007 | CN1297006C Clock generating circuit, integrated circuit storage devices and method for using said devices |
| 01/24/2007 | CN1296836C Circuit and method for implementing correction operation to only read memory in inlaid program |
| 01/24/2007 | CN1296833C Device and method for storage management |
| 01/23/2007 | US7168026 Method and apparatus for preservation of failure state in a read destructive memory |
| 01/23/2007 | US7168018 Apparatus and method for reducing test resources in testing DRAMs |
| 01/23/2007 | US7168017 Memory devices with selectively enabled output circuits for test mode and method of testing the same |
| 01/23/2007 | US7168016 Method and a device for testing electronic memory devices |
| 01/23/2007 | US7168013 Memory with element redundancy |
| 01/23/2007 | US7168010 Various methods and apparatuses to track failing memory locations to enable implementations for invalidating repeatedly failing memory locations |
| 01/23/2007 | US7168006 Method and system for saving the state of integrated circuits upon failure |
| 01/23/2007 | US7168005 Programable multi-port memory BIST with compact microcode |
| 01/23/2007 | US7167411 Apparatus for testing a nonvolatile memory and a method thereof |
| 01/23/2007 | US7167405 Data transfer verification systems and methods |
| 01/23/2007 | US7167404 Method and device for testing configuration memory cells in programmable logic devices (PLDS) |
| 01/23/2007 | US7167402 Semiconductor storage device, redundancy circuit thereof, and portable electronic device |
| 01/23/2007 | US7167393 Nonvolatile semiconductor memory device containing reference capacitor circuit |
| 01/23/2007 | US7167042 Semiconductor device having logic circuit and macro circuit |
| 01/18/2007 | WO2005034176A3 Apparatus and method for selectively configuring a memory device using a bi-stable relay |
| 01/18/2007 | WO2004051704A3 System and method for expanding a pulse width |
| 01/18/2007 | US20070016843 ECC for single 4-bits symbol correction of 32 symbols words with 21 maximum row weight matrix |
| 01/18/2007 | US20070016826 Configurable memory architecture with built-in testing mechanism |
| 01/18/2007 | US20070016738 Nonvolatile Semiconductor Memory |
| 01/18/2007 | US20070014172 Memory device capable of performing high speed reading while realizing redundancy replacement |
| 01/18/2007 | US20070014168 Method and circuit for configuring memory core integrated circuit dies with memory interface integrated circuit dies |
| 01/18/2007 | US20070014167 Semiconductor memory device with reduced multi-row address testing |
| 01/18/2007 | US20070014166 Redundancy power for communication devices |
| 01/18/2007 | US20070014165 Column redundancy reuse in memory devices |
| 01/18/2007 | US20070014162 Nonvolatile memory device including circuit formed of thin film transistors |
| 01/17/2007 | EP1743431A2 File download and streaming system |
| 01/17/2007 | CN1898751A Method circuit and system for read error detection in a non-volatile memory array |
| 01/17/2007 | CN1897512A Error correcting apparatus |
| 01/17/2007 | CN1897162A Semiconductor memory device and method of operating the same |
| 01/17/2007 | CN1295793C Semiconductor storage apparatus |
| 01/17/2007 | CN1295791C Integrated circuit device |
| 01/16/2007 | US7165206 SRAM-compatible memory for correcting invalid output data using parity and method of driving the same |
| 01/16/2007 | US7165197 Apparatus and method of analyzing a magnetic random access memory |
| 01/16/2007 | US7165193 Efficient memory allocation scheme for data collection |
| 01/16/2007 | US7165002 Test device for dynamic memory modules |
| 01/16/2007 | US7164602 Nonvolatile semiconductor memory device including high efficiency and low cost redundant structure |
| 01/16/2007 | US7164303 Delay circuit, ferroelectric memory device and electronic equipment |
| 01/11/2007 | WO2007005477A1 Storage element circuit |
| 01/11/2007 | WO2007005218A1 Apparatus and method for repairing a semiconductor memory |
| 01/11/2007 | US20070011601 ECC for single 4-bits symbol correction of 32 symbols words with 22 maximum row weight matrix |
| 01/11/2007 | US20070011584 Data encoding method and system |
| 01/11/2007 | US20070011583 Information storage medium on which drive data is recorded, and method of recording information on the information storage medium |
| 01/11/2007 | US20070011582 Error correction device of optical disk unit |
| 01/11/2007 | US20070011581 Memory controller, nonvolatile memory device, nonvolatile memory system and data writing method |
| 01/11/2007 | US20070011580 Information recording medium on which sector data generated from ECC block is recorded, information recording apparatus for recording sector data, and information reproduction apparatus for reproducing sector data |
| 01/11/2007 | US20070011579 Storage system, management server, and method of managing application thereof |
| 01/11/2007 | US20070011578 Reducing false positives in configuration error detection for programmable devices |
| 01/11/2007 | US20070011577 Trie-Type Memory Device With a Compression Mechanism |
| 01/11/2007 | US20070011576 Data managing method and optical disc drive for handling an decoding error of a readback data retrieved from an optical disc |
| 01/11/2007 | US20070011575 Autonomous method and apparatus for mitigating soft-errors in integrated circuit memory storage devices at run-time |
| 01/11/2007 | US20070011574 Memory device |
| 01/11/2007 | US20070011535 Semiconductor integrated circuit |
| 01/11/2007 | US20070011513 Selective activation of error mitigation based on bit level error count |
| 01/11/2007 | US20070011512 Semiconductor memory device and control method for the semiconductor memory device |
| 01/11/2007 | US20070011511 Built-in self-test method and system |
| 01/11/2007 | US20070011510 Semiconductor memory component and method for testing semiconductor memory components having a restricted memory area (partial good memories) |
| 01/11/2007 | US20070011509 Bitmap cluster analysis of defects in integrated circuits |
| 01/11/2007 | US20070011508 Time controllable sensing scheme for sense amplifier in memory IC test |
| 01/11/2007 | US20070011507 System and method for remote system support |
| 01/11/2007 | US20070011505 Information recording medium, recording device and recording method for information recording medium, reproduction device and reproduction method for information recording medium, computer program for recording or reproduction, and data structure containing control signal |
| 01/11/2007 | US20070011502 Structured interleaving/de-interleaving scheme for product code encoders/decoders |
| 01/11/2007 | US20070011400 External storage subsystem |
| 01/11/2007 | US20070011180 Systems and methods for enhanced stored data verification utilizing pageable pool memory |
| 01/11/2007 | US20070008811 256 Meg dynamic random access memory |
| 01/11/2007 | US20070008803 Semiconductor device, nonvolatile semiconductor memory, system including a plurality of semiconductor devices or nonvolatile semiconductor memories, electric card including semiconductor device or nonvolatile semiconductor memory, and electric device with which this electric card can be used |
| 01/11/2007 | US20070008794 256 Meg dynamic random access memory |
| 01/11/2007 | US20070008772 Thin film magnetic memory device having redundant configuration |
| 01/11/2007 | US20070008771 Tracking circuit for a memory device |