Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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02/20/2007 | US7180771 Device and method for pulse width control in a phase change memory device |
02/20/2007 | US7180361 Antifuse programming circuit in which one stage of transistor is interposed in a series with antifuse between power supplies during programming |
02/20/2007 | US7180313 Test device for wafer testing digital semiconductor circuits |
02/20/2007 | US7179690 High reliability triple redundant latch with voting logic on each storage node |
02/15/2007 | US20070038920 Information recording-reproducing apparatus and method of recording and reproducing information |
02/15/2007 | US20070038919 Semiconductor memory device |
02/15/2007 | US20070038907 Testing system and method for memory modules having a memory hub architecture |
02/15/2007 | US20070038906 Column/row redundancy architecture using latches programmed from a look up table |
02/15/2007 | US20070038905 Information storage medium, information recording/playback apparatus, and method of recording and playing back information |
02/15/2007 | US20070038904 Information storage medium, information recording/playback apparatus, and method of recording and playing back information |
02/15/2007 | US20070038901 Nonvolatile memory system |
02/15/2007 | US20070038800 Contiguous block addressing scheme |
02/15/2007 | US20070036011 Shared redundant memory architecture and memory system incorporating same |
02/15/2007 | US20070036010 Memory apparatus |
02/15/2007 | US20070035998 Nonvolatile memory apparatus |
02/15/2007 | DE102006036071A1 Speichermodul und Verfahren desselben Of the same memory module and method |
02/14/2007 | CN1914689A Non-volatile memory and method with control data management |
02/13/2007 | US7178087 Read-only record carrier with recordable area in subcode channel |
02/13/2007 | US7178073 Test method and test apparatus for an electronic module |
02/13/2007 | US7178072 Methods and apparatus for storing memory test information |
02/13/2007 | US7178067 Secure EEPROM memory comprising an error correction circuit |
02/13/2007 | US7177998 Method, system and memory controller utilizing adjustable read data delay settings |
02/13/2007 | US7177225 Block redundancy implementation in heirarchical RAM'S |
02/13/2007 | US7177217 Method and circuit for verifying and eventually substituting defective reference cells of a memory |
02/13/2007 | US7177211 Memory channel test fixture and method |
02/13/2007 | US7177210 Method for reading fuse information in a semiconductor memory |
02/13/2007 | US7177209 Semiconductor memory device and method of driving the same |
02/13/2007 | US7177204 Pulse width adjusting circuit for use in semiconductor memory device and method therefor |
02/13/2007 | US7177193 Programmable fuse and antifuse and method therefor |
02/13/2007 | US7177189 Memory defect detection and self-repair technique |
02/13/2007 | US7177186 High bandwidth datapath load and test of multi-level memory cells |
02/13/2007 | US7177170 Apparatus and method for selectively configuring a memory device using a bi-stable relay |
02/13/2007 | US7177123 Semiconductor integrated circuit |
02/13/2007 | US7176545 Apparatus and methods for maskless pattern generation |
02/13/2007 | US7176487 Semiconductor integrated circuit |
02/13/2007 | CA2429366C A method for non-destructive readout and apparatus for use with the method |
02/08/2007 | US20070033493 Using fractional sectors for mapping defects in disk drives |
02/08/2007 | US20070033492 Method and device for monitoring an electronic circuit |
02/08/2007 | US20070033491 Repair techniques for memory with multiple redundancy |
02/08/2007 | US20070033490 Semiconductor memory module with error correction |
02/08/2007 | US20070033489 Semiconductor Memory Device and Method of Operating the Same |
02/08/2007 | US20070033488 Persistent error detection in digital memory |
02/08/2007 | US20070033487 Semiconductor memory device and method of operating the same |
02/08/2007 | US20070033458 Diagnostic Method and Apparatus For Non-Destructively Observing Latch Data |
02/08/2007 | US20070033453 Test of ram address decoder for resistive open defects |
02/08/2007 | US20070033452 Method and circuit arrangement for detecting errors in a data record |
02/08/2007 | US20070033451 Method for Writing Data Blocks on a Block Addressable Storage Medium Using Defect Management |
02/08/2007 | US20070033450 Column redundancy system for an integrated circuit memory |
02/08/2007 | US20070033449 Flash memory device and method of repairing defects and trimming voltages |
02/08/2007 | US20070030755 Apparatus for testing a nonvolatile memory and a method thereof |
02/08/2007 | US20070030743 Semiconductor memory device |
02/08/2007 | US20070030742 Combination column redundancy system for a memory array |
02/08/2007 | DE112005000591T5 Testgerät und Testverfahren Test apparatus and test procedure |
02/08/2007 | DE102006004168A1 Überprüfung eines Adressdecoders Review of an address decoder |
02/08/2007 | DE10043397B4 Flash-Speicherbauelement mit Programmierungszustandsfeststellungsschaltung und das Verfahren dafür Flash memory device with programming state detection circuit and method thereof |
02/07/2007 | EP1750283A2 Verification of an address decoder |
02/07/2007 | EP1750282A1 A shared redundant memory architecture and memory system incorporating the same |
02/07/2007 | CN1909114A 半导体存储器件 A semiconductor memory device |
02/07/2007 | CN1299293C Information regenerative device |
02/06/2007 | US7174496 Error correction code block generating method and apparatus and optical storage medium containing error correction code block |
02/06/2007 | US7174489 Semiconductor memory test device |
02/06/2007 | US7174487 Recording medium having spare area for defect management and information on defect management, and method of allocating spare area and method of managing defects |
02/06/2007 | US7174486 Automation of fuse compression for an ASIC design system |
02/06/2007 | US7174483 Method for operating a processor-controlled system |
02/06/2007 | US7174477 ROM redundancy in ROM embedded DRAM |
02/06/2007 | US7173873 Device and method for breaking leakage current path |
02/06/2007 | US7173872 Method and apparatus for controlling a high voltage generator in a wafer burn-in test |
02/06/2007 | US7173840 Acceleration of the programming of a memory module with the aid of a boundary scan (BSCAN) register |
02/06/2007 | US7173839 Large scale integrated circuit and at speed test method thereof |
02/06/2007 | US7173549 Semiconductor integrated circuit in which voltage down converter output can be observed as digital value and voltage down converter output voltage is adjustable |
02/06/2007 | US7173547 Offset compensation in local-probe data storage devices |
02/01/2007 | WO2006042058B1 Memory regulator system with test mode |
02/01/2007 | US20070028153 Information recording method, information recording system, drive control unit, and semiconductor integrated circuit |
02/01/2007 | US20070028150 Error correcting memory access means and method |
02/01/2007 | US20070025168 Method for testing memory device |
02/01/2007 | US20070025167 Method for testing a memory device, test unit for testing a memory device and memory device |
02/01/2007 | US20070025166 Program/erase waveshaping control to increase data retention of a memory cell |
02/01/2007 | US20070025150 Flash memory device capable of preventing program disturbance according to partial programming |
02/01/2007 | US20070025149 Nonvolatile Semiconductor Memory Device |
02/01/2007 | DE69932962T2 Kodierungsverfahren und Speicheranordnung Coding method and storage device |
02/01/2007 | DE202006015530U1 Wafer test unit has base plate with test circuit and groups of electrically conductive springs to contact the wafer |
02/01/2007 | DE19952947B4 Anordnung zum Auslesen von Register-Information Arrangement for reading register information |
02/01/2007 | DE102006031055A1 Halbleiterspeichervorrichtung und Verfahren zu deren Herstellung A semiconductor memory device and methods for their preparation |
02/01/2007 | DE102005049845A1 Verfahren zum Testen einer Speicheranordnung, Speicheranordnung und Testeinheit zum Testen einer solchen A method of testing a memory array, memory array and test unit for testing such a |
01/31/2007 | CN1905077A System and method for testing device unit of phase change storage |
01/31/2007 | CN1905076A Method for implementing dynamic storage error static detecting of embedded system |
01/31/2007 | CN1904843A Autonomous method and apparatus for mitigating soft-errors in integrated circuit memory storage devices at run-time |
01/30/2007 | US7171611 Apparatus for determining the access time and/or the minimally allowable cycle time of a memory |
01/30/2007 | US7171608 Data playback equipment for playing back data recorded on a disk medium |
01/30/2007 | US7171607 Apparatus and method for verifying erasure correction function |
01/30/2007 | US7171606 Software download control system, apparatus and method |
01/30/2007 | US7171605 Check bit free error correction for sleep mode data retention |
01/30/2007 | US7171600 Semiconductor wiring substrate, semiconductor device, method for testing semiconductor device, and method for mounting semiconductor device |
01/30/2007 | US7171598 Tester system having a multi-purpose memory |
01/30/2007 | US7171597 Input/output compression test circuit |
01/30/2007 | US7171596 Circuit and method for testing embedded DRAM circuits through direct access mode |
01/30/2007 | US7171595 Content addressable memory match line detection |
01/30/2007 | US7171592 Self-testing circuit in semiconductor memory device |
01/30/2007 | US7171591 Method and apparatus for encoding special uncorrectable errors in an error correction code |
01/30/2007 | US7171536 Unusable block management within a non-volatile memory system |