| Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524) |
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| 03/28/2007 | CN1936856A Method for measuring internal memory using self-starting microoperation system |
| 03/28/2007 | CN1307648C A method for testing a memory array and a memory-based device so testable with a fault response signalizing mode for when finding predetermined correspondence between fault patterns signalizing one su |
| 03/27/2007 | US7197684 Single-ended transmission for direct access test mode within a differential input and output circuit |
| 03/27/2007 | US7197679 Method for testing an integrated semiconductor memory with a shortened reading time |
| 03/27/2007 | US7197678 Test circuit and method for testing an integrated memory circuit |
| 03/27/2007 | US7197677 System and method to asynchronously test RAMs |
| 03/27/2007 | US7197676 Loop-Back Memory-Module Extender Card for Self-Testing Fully-Buffered Memory Modules |
| 03/27/2007 | US7197675 Method and apparatus for determining the write delay time of a memory utilizing the north bridge chipset as in charge of the works for checking the write delay time of the memory |
| 03/27/2007 | US7197674 Method and apparatus for conditioning of a digital pulse |
| 03/27/2007 | US7197673 Memory interlace-checking method |
| 03/27/2007 | US7197672 Recording medium having spare area for defect management and information on defect management, and method of allocating spare area and method of managing defects |
| 03/27/2007 | US7197613 Nonvolatile memory |
| 03/27/2007 | US7197595 Nonvolatile memory and method of address management |
| 03/27/2007 | US7197593 Bad-sector search method, data recording device, and program |
| 03/27/2007 | US7197582 Low latency FIFO circuit for mixed clock systems |
| 03/27/2007 | US7196931 Non-volatile memory and method with reduced source line bias errors |
| 03/27/2007 | US7196554 Integrated clock supply chip for a memory module, memory module comprising the integrated clock supply chip, and method for operating the memory module under test conditions |
| 03/27/2007 | US7196537 Integrated circuit |
| 03/27/2007 | US7196534 Semiconductor test instrument |
| 03/22/2007 | WO2007032588A1 Semiconductor memory device having bit registering layer and method of driving the same |
| 03/22/2007 | WO2007032194A1 Testing device, testing method, analyzing device, and program |
| 03/22/2007 | WO2007032192A1 Testing device, testing method, program, and recording medium |
| 03/22/2007 | US20070067706 Testing ram address decoder for resistive open defects |
| 03/22/2007 | US20070067701 Recording control device, recording control method and program |
| 03/22/2007 | US20070067700 Error correction apparatus and method thereof |
| 03/22/2007 | US20070067699 Semiconductor integrated circuit device |
| 03/22/2007 | US20070067698 Techniques to perform prefetching of content in connection with integrity validation value determination |
| 03/22/2007 | US20070067685 Testing apparatus and testing method |
| 03/22/2007 | US20070067684 Non-volatile memory system with self test capability |
| 03/22/2007 | US20070067556 Apparatus and method for memory bit-swapping-within-address-range circuit |
| 03/22/2007 | US20070066367 Method and arrangement for repairing memory chips using microlithography methods |
| 03/22/2007 | US20070064510 Method And Apparatus For Evaluating And Optimizing A Signaling System |
| 03/22/2007 | US20070064509 Method and device for transmission of adjustment information for data interface drivers for a RAM module |
| 03/22/2007 | US20070064508 Fuse trimming circuit |
| 03/22/2007 | US20070064507 Semiconductor memory device having bit registering layer and method of driving the same |
| 03/22/2007 | DE102006036329A1 Testmodus und Testverfahren für erhöhte Belastungstastverhältnisse während der Voralterung Test mode and test methods for increased Belastungstastverhältnisse during the burn-in |
| 03/22/2007 | DE102006033189A1 Signaturdatenschaltkreis, Halbleiterbauelement und Verfahren zum Lesen von Signaturinformationen Signature data circuit, semiconductor device and method of reading signature information |
| 03/22/2007 | DE102005042790A1 Integrated circuit and protection method as for chip cards has circuit section and test unit to test and evaluate the circuit function on receipt of a start signal or internally |
| 03/22/2007 | DE10152086B4 Verfahren zum Testen einer Mehrzahl von Bauelementen auf einem Wafer mit einer gemeinsamen Datenleitung und einer gemeinsamen Versorgungsleitung A method for testing a plurality of devices on a wafer with a common data line and a common supply line |
| 03/21/2007 | EP1764700A1 System for elevator electronic safety device |
| 03/21/2007 | CN1934655A Method for detecting resistive-open defects in semiconductor memories |
| 03/21/2007 | CN1934654A Testing apparatus and testing method |
| 03/21/2007 | CN1934455A Test device and test method |
| 03/21/2007 | CN1933027A Method and system for nand-flash identification |
| 03/21/2007 | CN1932773A Method for testing physical memory |
| 03/21/2007 | CN1306593C Read/program potential generating circuit |
| 03/20/2007 | US7194675 Backup method, backup system, disk controller and backup program |
| 03/20/2007 | US7194670 Command multiplier for built-in-self-test |
| 03/20/2007 | US7194667 System for storing device test information on a semiconductor device using on-device logic for determination of test results |
| 03/20/2007 | US7194052 Data capture circuit with self-test capability |
| 03/20/2007 | US7193926 Memory device for reducing leakage current |
| 03/20/2007 | US7193918 Process for refreshing a dynamic random access memory and corresponding device |
| 03/20/2007 | US7193917 Semiconductor storage device, test method therefor, and test circuit therefor |
| 03/20/2007 | US7193910 Adjustable timing circuit of an integrated circuit |
| 03/20/2007 | US7193896 Multi-value semiconductor memory device and method capable of caching a lower page data upon an incomplete write of an upper page data |
| 03/20/2007 | US7193882 Semiconductor memory device |
| 03/20/2007 | US7193877 Content addressable memory with reduced test time |
| 03/20/2007 | US7192846 Methods and systems for processing a device, methods and systems for modeling same and the device |
| 03/20/2007 | CA2335331C Method and system for authenticating digital optical media |
| 03/15/2007 | US20070061685 Method, system, and apparatus for adjacent-symbol error correction and detection code |
| 03/15/2007 | US20070061684 Systems, methods, and apparatuses for using the same memory type for both error check and non-error check memory systems |
| 03/15/2007 | US20070061683 Error correction apparatus and method for data stored in memory |
| 03/15/2007 | US20070061639 Semiconductor device test system with test interface means |
| 03/15/2007 | US20070061638 Multi drive test system for data storage device |
| 03/15/2007 | US20070061637 Process for conducting high-speed bitmapping of memory cells during production |
| 03/15/2007 | US20070061636 Optical disc recording/reproducing apparatus |
| 03/15/2007 | US20070058476 Semiconductor memory device |
| 03/15/2007 | US20070058475 Storage device employing a flash memory |
| 03/15/2007 | US20070058466 Internally asymmetric methods and circuits for evaluating static memory cell dynamic stability |
| 03/15/2007 | US20070058465 NAND flash memory cell programming |
| 03/15/2007 | US20070058464 Semiconductor storage device, electronic apparatus, and mode setting method |
| 03/15/2007 | US20070058463 Rescue circuit line, display device having the same and method for manufacturing the same |
| 03/15/2007 | US20070058462 Memory address repair without enable fuses |
| 03/15/2007 | US20070058461 Semiconductor device |
| 03/15/2007 | US20070058416 Inspection method for semiconductor memory |
| 03/15/2007 | DE102006039473A1 Datenspeichersystem und Verfahren zum Übertragen von Daten in einen Datenspeicher The data storage system and method for transferring data in a data memory |
| 03/15/2007 | DE102006036146A1 Verfahren zum Überprüfen einer Programmieroperation eines NOR-Flash-Speicherelements und NOR-Flash-Speicherelement A method for checking a program operation of a NOR flash memory device and the NOR flash memory device |
| 03/15/2007 | DE102006030360A1 Verfahren und Vorrichtung zum selektiven Zugreifen auf und zum Konfigurieren von einzelnen Chips eines Halbleiterwafers Method and apparatus for selectively accessing and configuring individual chips of a semiconductor wafer |
| 03/14/2007 | CN1930636A Method for detecting resistive bridge defects in the global data bus of semiconductor memories |
| 03/14/2007 | CN1930635A Adaptive deterministic grouping of blocks into multi-block units |
| 03/14/2007 | CN1929034A Method and system for RAM fault testing |
| 03/14/2007 | CN1929033A 半导体器件 Semiconductor devices |
| 03/13/2007 | US7191386 Method and apparatus for additive trellis encoding |
| 03/13/2007 | US7191382 Methods and apparatus for correcting data and error detection codes on the fly |
| 03/13/2007 | US7191379 Magnetic memory with error correction coding |
| 03/13/2007 | US7191378 Method and system for providing low density parity check (LDPC) encoding |
| 03/13/2007 | US7191359 Fail-safe controller |
| 03/13/2007 | US7191296 Data writing apparatus, data writing method, and program |
| 03/13/2007 | US7190625 Method and apparatus for data compression in memory devices |
| 03/13/2007 | US7190622 Method and architecture to calibrate read operations in synchronous flash memory |
| 03/13/2007 | US7190620 Method for operating a memory device |
| 03/13/2007 | US7190617 Flash EEprom system |
| 03/13/2007 | US7190606 Test mode control device using nonvolatile ferroelectric memory |
| 03/08/2007 | WO2007025817A2 Data processing system with error correction and a method for the operation thereof |
| 03/08/2007 | WO2007025816A2 Memory arrangement and method for the operation thereof |
| 03/08/2007 | WO2005122630B1 Arrangement in a network node for secure storage and retrieval of encoded data distributed among multiple network nodes |
| 03/08/2007 | US20070055920 Digital signal processing method, data recording and reproducing apparatus, and data recording medium that are resistant to burst errors |
| 03/08/2007 | US20070055907 Self-reparable semiconductor and method thereof |
| 03/08/2007 | US20070055906 Self-reparable semiconductor and method thereof |
| 03/08/2007 | US20070055845 Self-reparable semiconductor and method thereof |