Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
11/2012
11/15/2012WO2012118770A8 System and method for bonded configuration pad continuity check
11/15/2012US20120290895 Controller for detecting and correcting an error without a buffer, and method for operating same
11/15/2012US20120290889 High-speed serial interface bridge adapter for signal integrity verification
11/15/2012US20120287738 Measuring device and a measuring method with histogram formation
11/15/2012US20120287737 Repairing circuit for memory circuit and method thereof and memory circuit using the same
11/15/2012US20120287725 Memory controller with selective data transmission delay
11/15/2012DE102007006508B4 Mikrocontroller mit Speicher-Trace-Modul Microcontroller with memory trace module
11/14/2012EP2521972A2 Error correction in a stacked memory
11/14/2012CN102782766A System and method to select a reference cell
11/14/2012CN102782765A Repairable IO in an integrated circuit
11/14/2012CN102779557A Method and system for data detection and correction of memory module integrated chip
11/14/2012CN102142281B Device and method for carrying out fault online detection by using parity check codes
11/14/2012CN101944392B Test system of PROM
11/14/2012CN101650975B Static random access memory ageing and screening method and chip ageing and screening method
11/14/2012CN101154469B Semiconductor device and high pressure test method thereof
11/13/2012US8312331 Memory testing with snoop capabilities in a data processing system
11/08/2012WO2012151131A1 Non-volatile memory and method having efficient on-chip block-copying with controlled error rate
11/08/2012WO2012151107A1 Detection of broken word-lines in memory arrays
11/08/2012DE19826330B4 Kombinierter integrierter Speicher- und Logikschaltkreis und Betriebsverfahren hierfür Combined integrated memory and logic circuit and operating method therefor
11/07/2012EP2519953A2 Robust memory link testing using memory controller
11/07/2012EP2519952A2 Tamper resistant fuse design
11/07/2012CN102768861A Controller of memory device and method for operating the same
11/07/2012CN102768860A Monitoring device of integrated circuit
11/07/2012CN101789267B Measuring method of intrinsic threshold voltage of nonvolatile memory
11/07/2012CN101127245B Electrical fuse circuit, memory device and electronic part
11/06/2012US8307270 Advanced memory device having improved performance, reduced power and increased reliability
11/06/2012US8307264 Detection apparatus
11/06/2012US8307263 Method and apparatus for dispersed storage of streaming multi-media data
11/06/2012US8307262 Data read-out circuit in semiconductor memory device and method of data reading in semiconductor memory device
11/06/2012US8307261 Non-volatile memory management method
11/06/2012US8307260 Memory apparatus and method using erasure error correction to reduce power consumption
11/06/2012US8307259 Hardware based memory scrubbing
11/06/2012US8307258 Apparatus, system, and method for reconfiguring an array to operate with less storage elements
11/06/2012US8307249 At-speed bitmapping in a memory built-in self-test by locking an N-TH failure
11/06/2012US8307198 Distributed multi-core memory initialization
11/06/2012US8305822 Fuse circuit and semiconductor memory device including the same
11/01/2012WO2012147315A1 Resistive non-volatile storage device and drive method for same
11/01/2012US20120278681 Selective error detection and error correction for a memory interface
11/01/2012US20120276754 Methods and systems for thermal-based laser processing a multi-material device
11/01/2012US20120275249 Redundancy circuits and operating methods thereof
11/01/2012US20120275248 Semiconductor apparatus
11/01/2012US20120275247 Semiconductor memory device and method for repairing the same
11/01/2012US20120275246 Multi-test apparatus and method for semiconductor chips
10/2012
10/31/2012DE112010003645T5 Festkörper-Speichersystem mit Parallelem Zugriff aus Mehreren Flash/PCM-Einrichtungen Solid-state storage system with parallel access from Multiple Flash / PCM devices
10/31/2012CN202512901U Memory test equipment with frequency test function
10/31/2012CN102760497A Chip with JTAG (joint test action group) interface
10/31/2012CN102760496A Word line leakage detecting method, system and storage media of Nor type flash memory device
10/31/2012CN102760493A Nonvolatile memory apparatus and verification method thereof
10/31/2012CN101989464B Memory test method and external tester
10/30/2012US8301981 Data access method for flash memory and storage system and controller thereof
10/30/2012US8301980 Error detection and correction for external DRAM
10/30/2012US8301979 Low density parity code (LDPC) decoding for memory with multiple log likelihood ratio (LLR) decoders
10/30/2012US8301978 Memory device and method of storing data with error correction using codewords
10/30/2012US8301977 Accelerating phase change memory writes
10/30/2012US8301963 Low-density parity-check code based error correction for memory device
10/30/2012US8301959 Apparatus and method for processing beam information using low density parity check code
10/30/2012US8301948 Storage device with adaptive error-correcting code for improved areal efficiency
10/30/2012US8301942 Managing possibly logically bad blocks in storage devices
10/30/2012US8301941 Memory controller with loopback test interface
10/25/2012US20120272108 Memory and test method for memory
10/25/2012US20120269018 Memory system having memory and memory controller and operation method thereof
10/25/2012US20120269005 Semiconductor memory device and test method thereof
10/24/2012EP2513909A1 Antifuse programmable memory array
10/24/2012CN202502761U Device for automatic outage testing of PATA (parallel advanced technology attachment) and SATA (serial advanced technology attachment) electronic discs
10/24/2012CN102750989A Memory built-in self-test method and memory error check method
10/24/2012CN102750988A Memory devices, systems and methods employing command/address calibration
10/24/2012CN102750974A Two dimensional data eye centering for source synchronous data transfers
10/24/2012CN102142282B Method for identifying ECC verification algorithm of NAND Flash memory chip
10/24/2012CN101859604B Utilization method of flash memory bad block
10/24/2012CN101710237B Equipment production flow using flash memory as storage medium
10/23/2012US8296628 Data path read/write sequencing for reduced power consumption
10/23/2012US8296627 Address generation apparatus and method of data interleaver/deinterleaver
10/23/2012US8296626 Error correction for flash memory
10/23/2012US8296623 Codes for limited magnitude asymmetric errors in flash memories
10/23/2012US8296611 Test circuit for input/output array and method and storage device thereof
10/23/2012US8296606 Memory device and method for repairing a semiconductor memory
10/23/2012US8295109 Replacing defective columns of memory cells in response to external addresses
10/23/2012US8295108 Architecture, system and method for compressing repair data in an integrated circuit (IC) design
10/23/2012US8295107 Asynchronous pipelined memory access
10/18/2012US20120266046 Apparatus, system, and method for using multi-level cell solid-state storage as single-level cell solid-state storage
10/18/2012US20120266034 Semiconductor memory device and test method thereof
10/18/2012US20120266027 Storage apparatus and method of controlling the same
10/18/2012US20120263002 Test method for screening local bit-line defects in a memory array
10/18/2012US20120263001 Systems, memories, and methods for refreshing memory arrays
10/18/2012US20120262996 Device
10/17/2012CN102737727A Method and system for testing stability of double date rate synchronous dynamic random access memory
10/17/2012CN102737726A Method for detecting defects of storage array local bit line
10/17/2012CN102737725A Programmable built-in self testing system capable of automatic optimization on memory performance and built-in self testing method
10/17/2012CN102737724A System and method for testing nonvolatile random access memory (NVRAM)
10/17/2012CN102737723A Semiconductor memory device
10/17/2012CN102737722A Self-detection mending method for built-in self-test system
10/17/2012CN102737721A Hard disk array on-off testing device and method
10/17/2012CN102737718A Apparatus and method to adjust clock duty cycle of memory
10/16/2012US8291297 Data error recovery in non-volatile memory
10/16/2012US8291295 NAND flash memory controller exporting a NAND interface
10/16/2012US8291294 Intersymbol interference encoding in a solid state drive
10/16/2012US8291272 Macro and command execution from memory array
10/16/2012US8291271 Programming error correction code into a solid state memory device with varying bits per cell
10/16/2012US8291270 Request processing device, request processing system, and access testing method
10/16/2012US8291152 Method for operating non-volatile memory and data storage system using the same
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