Patents
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
02/2013
02/07/2013WO2013019713A1 Memory die self-disable if programmable element is not trusted
02/07/2013WO2013019672A1 System and method for testing fuse blow reliability for integrated circuits
02/07/2013WO2013018281A1 Resistance variable nonvolatile memory device, and driving method therefor
02/07/2013WO2013018202A1 Data communication device and control method
02/07/2013US20130033948 Device and method for detecting resistive defect
02/07/2013US20130033935 Memory die self-disable if programmable element is not trusted
02/06/2013CN102915771A SRAM noise margin measuring method
02/06/2013CN102915770A Method for reducing inter-crosstalk of internal data of flash memory chip, flash memory storage system and controller thereof
02/06/2013CN102915769A Implementation and optimization method for processor EDAC (error detection and correction) circuit
02/06/2013CN102915768A Device and method for tolerating faults of storage based on triple modular redundancy of EDAC module
02/06/2013CN102915767A Method, device and system for improving SSD (solid state disk) response speed on basis of data compressibility
02/06/2013CN102915766A Systems and methods for operating on a storage device using a life-cycle dependent coding scheme
02/06/2013CN102915764A Method for improving defect tolerance of flash memory chips, flash memory system and controller thereof
02/06/2013CN101510447B Redundancy circuit in semiconductor memory device
02/05/2013US8370720 Mass storage device and method for offline background scrubbing of solid-state memory devices
02/05/2013US8370719 Persistent moving read reference
02/05/2013US8370717 Method and apparatus for flexible buffers in an XOR engine
02/05/2013US8370716 USB device and correction method thereof
02/05/2013US8370715 Error checking addressable blocks in storage
02/05/2013US8370714 Reference cells for spin torque based memory device
02/05/2013US8370713 Error correction code decoding device
02/05/2013US8370712 Memory management in a non-volatile solid state memory device
02/05/2013US8370710 Non-volatile memory devices, systems, and data processing methods thereof
02/05/2013US8370708 Data error measuring circuit for semiconductor memory apparatus
02/05/2013US8370705 System and method for calculating a checksum address while maintaining error correction information
02/05/2013US8370691 Testing of soft error detection logic for programmable logic devices
02/05/2013US8369167 Semiconductor memory device and method of testing a sense amplifier of the same
02/05/2013US8369166 Redundancy system for non-volatile memory
02/05/2013US8369145 Apparatus and method for detecting over-programming condition in multistate memory device
02/05/2013US8369137 Semiconductor memory device including a write driver to output a program signal
01/2013
01/31/2013WO2013016467A1 Non-volatile memory saving cell information in a non-volatile memory array
01/31/2013WO2013014974A1 Memory controller, semiconductor storage device, and decoding method
01/31/2013US20130031432 Fully-buffered dual in-line memory module with fault correction
01/31/2013US20130031430 Non-Volatile Memory and Method with Accelerated Post-Write Read Using Combined Verification of Multiple Pages
01/31/2013US20130031429 Data Recovery for Defective Word Lines During Programming of Non-Volatile Memory Arrays
01/31/2013US20130028036 Method of Screening Static Random Access Memories for Unstable Memory Cells
01/31/2013US20130028035 Memory device
01/31/2013DE19603107B4 Selbst-Voralterungsschaltung für Halbleiterspeicher Self-Voralterungsschaltung for semiconductor memories
01/31/2013DE102011079780A1 Vorrichtung und Verfahren zum Testen eines Speichers eines elektrischen Gerätes Apparatus and method for testing a memory of an electrical apparatus
01/30/2013EP2551855A2 Device and method for testing a storage of an electronic device
01/30/2013EP2550661A1 Composite semiconductor memory device with error correction
01/30/2013CN102903395A Reliability testing method for memories
01/30/2013CN102903394A Semiconductor memory apparatus and semiconductor system having the same
01/30/2013CN102903393A Memory built-in self-test circuit
01/30/2013CN102903392A Memory cell test circuit and test method thereof
01/30/2013CN102903391A Memory chip and method for operating the same
01/30/2013CN101976584B Quasi-cyclic low density parity-check code (QC-LDPC) decoder and decoding method
01/30/2013CN101770814B Flash memory, test method thereof and test system thereof
01/29/2013US8365055 High performance cache directory error correction code
01/29/2013US8365044 Memory device with error correction based on automatic logic inversion
01/29/2013US8365043 Efficient redundant memory unit array
01/29/2013US8365042 Unidirectional error code transfer for both read and write data transmitted via bidirectional data link
01/29/2013US8365041 MLC self-raid flash data protection scheme
01/29/2013US8365040 Systems and methods for handling immediate data errors in flash memory
01/29/2013US8365039 Adjustable read reference for non-volatile memory
01/29/2013US8365028 Apparatus, methods, and system of NAND defect management
01/29/2013US8365027 Processor and method for controlling storage-device test unit
01/29/2013US8365026 Methods for performing fail test, block management, erasing and programming in a nonvolatile memory device
01/29/2013US8365025 Flash memory
01/29/2013US8363496 Semiconductor memory device performing refresh operation and method of testing the same
01/29/2013US8362766 Circuit for analyzing and affecting subtle energy resonance
01/24/2013WO2011157568A8 Method of protecting a configurable memory against permanent and transient errors and related device
01/24/2013US20130024746 Systems and methods of storing data
01/24/2013US20130024736 Programming error correction code into a solid state memory device with varying bits per cell
01/24/2013US20130021864 Array Power Supply-Based Screening of Static Random Access Memory Cells for Bias Temperature Instability
01/24/2013US20130021863 Test mode initialization device and method
01/24/2013US20130021862 Dram and method for testing the same in the wafer level burn-in test mode
01/24/2013US20130021861 Mechanisms for built-in self test and repair for memory devices
01/24/2013US20130021860 Mechanisms for built-in self repair of memory devices using failed bit maps and obvious repairs
01/24/2013US20130021859 Mechanisms for built-in self repair of memory devices using failed bit maps and obvious repairs
01/23/2013EP2548205A1 Generic march element based memory built-in self test
01/23/2013EP2548148A2 Modeling of cell delay change for electronic design automation
01/23/2013CN102893336A Memory device having a local current sink
01/23/2013CN102890971A Reliability test method for memory
01/23/2013CN102890970A POP (Post Office Protocol) packaged SOC (System on Chip) DRAM (Dynamic Random Access Memory) input/output test method and device
01/23/2013CN102890969A Data processing method, memory controller and memory storage device
01/23/2013CN102890968A Die executing test mode operation and method for performing test mode operation
01/23/2013CN102890967A Methods for preheating laser-based system
01/23/2013CN101840733B Reliability test method
01/23/2013CN101807437B Automatic scanning and sorting system and automatic scanning method for flash memories
01/23/2013CN101640074B Memory repair circuit and imitative dual-port static random access memory using same
01/23/2013CN101540203B Method for changing operation program in real time
01/23/2013CN101499323B Memory module
01/23/2013CN101405815B Non-volatile memory and method with redundancy data buffered in data latches for defective locations
01/22/2013US8359524 Parallel reed-solomon RAID (RS-RAID) architecture, device, and method
01/22/2013US8359521 Providing a memory device having a shared error feedback pin
01/22/2013US8359517 Memory system and method using partial ECC to achieve low power refresh and fast access to data
01/22/2013US8359501 Memory board with self-testing capability
01/22/2013US8359456 Generating random addresses for verification of distributed computerized devices
01/22/2013US8359445 Method and apparatus for signaling between devices of a memory system
01/22/2013US8358548 Methods for efficiently repairing embedded dynamic random-access memory having marginally failing cells
01/22/2013US8358525 Low cost high density rectifier matrix memory
01/17/2013US20130019138 Data processing method, memory controller, and memory storage device
01/17/2013US20130019133 Methods for testing a memory embedded in an integrated circuit
01/17/2013US20130019132 Detecting random telegraph noise induced failures in an electronic memory
01/17/2013US20130019131 Measurement of latency in data paths
01/17/2013US20130019130 Testing electronic memories based on fault and test algorithm periodicity
01/17/2013US20130016574 Semiconductor memory device having improved refresh characteristics
01/16/2013EP2546752A1 Memory diagnostic method, memory diagnostic device, and memory diagnostic program
01/16/2013EP2545554A2 Ldpc erasure decoding for flash memories
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