Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation
Patents for G11C 29 - Checking stores for correct operation; Testing stores during standby or offline operation (30,524)
12/2014
12/02/2014US8904097 Measure of health for writing to locations in flash
12/02/2014US8902893 Packet processing apparatus and method capable of generating modified packets by modifying payloads of specific packets identified from received packets
12/02/2014US8902687 Semiconductor device enabling refreshing of redundant memory cell instead of defective memory cell
12/02/2014US8902686 Memory device, operation method thereof, and memory system having the same
12/02/2014US8902684 Integrated circuit, system including the same, and operation method of the system
12/02/2014US8902683 Memory access alignment in a double data rate (‘DDR’) system
12/02/2014US8902681 Setting a reference voltage in a memory controller trained to a memory device
12/02/2014US8902673 Method of testing a semiconductor memory device
12/02/2014US8902661 Block structure profiling in three dimensional memory
12/02/2014US8902657 Semiconductor memory device and controller
12/02/2014US8902638 Replacement of a faulty memory cell with a spare cell for a memory circuit
11/2014
11/27/2014US20140351663 Single check memory devices and methods
11/27/2014US20140351662 Read only memory (rom) with redundancy
11/27/2014US20140351653 Memory card test interface
11/27/2014US20140351630 Apparatuses, systems, devices, and methods of replacing at least partially non-functional portions of memory
11/27/2014US20140351495 Local checkpointing using a multi-level cell
11/27/2014US20140347944 Methods and apparatuses for stacked device testing
11/27/2014US20140347943 Semiconductor package including stacked chips and method of fabricating the same
11/27/2014US20140347940 Semiconductor devices and semiconductor systems including the same
11/27/2014US20140347938 Semiconductor apparatus
11/27/2014US20140347936 Recovery of interfacial defects in memory cells
11/25/2014US8898546 Error recovery using erasures for NAND flash
11/25/2014US8898545 Semiconductor storage device and control method of nonvolatile memory
11/25/2014US8898544 DRAM error detection, evaluation, and correction
11/25/2014US8898543 Nonvolatile memory device, system, and method providing fast program and read operations
11/25/2014US8898542 Executing partial tasks in a distributed storage and task network
11/25/2014US8898541 Storage controller, storage device, information processing system, and storage controlling method
11/25/2014US8898540 Counter update through atomic operation
11/25/2014US8898531 Test apparatus and test method
11/25/2014US8898528 DDR JTAG interface setting flip-flops in high state at power-up
11/25/2014US8898426 Target buffer address region tracking
11/25/2014US8897093 Controlling method of connector, connector, and memory storage device
11/25/2014US8897088 Nonvolatile logic array with built-in test result signal
11/25/2014US8897087 Memory device and operating method of memory device and memory system
11/25/2014US8897086 Method and apparatus for memory fault tolerance
11/25/2014US8897082 Data transmission circuit and semiconductor memory device including the same
11/25/2014US8897081 Semiconductor memory device
11/25/2014US8897065 Efficient data storage in multi-plane memory devices
11/25/2014US8897062 Memory programming for a phase change memory cell
11/25/2014US8897055 Memory device, method of operating the same, and electronic device having the memory device
11/20/2014US20140344635 Methods And Apparatus For Testing And Repairing Digital Memory Circuits
11/20/2014US20140344616 Techniques for providing data redundancy after reducing memory writes
11/20/2014US20140340975 Semiconductor integrated circuit and method of testing semiconductor integrated circuit
11/20/2014US20140340971 Semiconductor circuit and leakage current test system
11/20/2014US20140340965 Selective re-programming of analog memory cells
11/20/2014US20140339618 Circuit having capacitor coupled with memory element
11/18/2014US8892981 Data recovery using outer codewords stored in volatile memory
11/18/2014US8892969 Apparatus, methods, and system of NAND defect management
11/18/2014US8892967 Measurement device and measurement method
11/18/2014US8892966 Methods and apparatus for soft data generation for memory devices using decoder performance feedback
11/18/2014US8892942 Rank sparing system and method
11/18/2014US8892387 Driving circuit of a test access port
11/18/2014US8891323 Semiconductor memory device capable of measuring write current and method for measuring write current
11/18/2014US8891322 Memory system with a layer comprising a dedicated redundancy area
11/18/2014US8891318 Semiconductor device having level shift circuit
11/13/2014US20140334239 I/o circuit with phase mixer for slew rate control
11/13/2014US20140334228 Linearly related threshold voltage offsets
11/13/2014US20140334223 Apparatuses and methods for determining stability of a memory cell
11/11/2014US8887027 Solid-state mass storage device and method for failure anticipation
11/11/2014US8887026 Efficient detection of errors in associative memory
11/11/2014US8887025 Techniques for storing data in stuck memory cells
11/11/2014US8887014 Managing errors in a DRAM by weak cell encoding
11/11/2014US8887013 Mapping of random defects in a memory device
11/11/2014US8887012 Method and apparatus for saving and restoring soft repair data
11/11/2014US8887011 Erased page confirmation in multilevel memory
11/11/2014US8885436 Semiconductor memory device and method of driving the same
11/11/2014US8885433 Semiconductor device having fuse circuit
11/11/2014US8885429 Memory device and a method for erasing data stored in the memory device
11/11/2014US8885426 Compression of content entries in storage for replacing faulty memory cells
11/11/2014US8885425 Semiconductor memory and method of controlling the same
11/11/2014US8885408 Nonvolatile semiconductor memory device for rendering the same in a busy state after inputting data therein
11/11/2014US8885406 Memory device, memory control device, and memory control method
11/11/2014US8885388 Apparatus and method for reforming resistive memory cells
11/11/2014US8884666 Clock generator
11/11/2014US8884642 Circuit having an external test voltage
11/11/2014US8884637 Method and apparatus for testing a memory device
11/11/2014US8883521 Control method of multi-chip package memory device
11/06/2014US20140328133 Semiconductor device, control method thereof and data processing system
11/06/2014US20140328132 Memory margin management
11/06/2014US20140328121 Immunity of Phase Change Material to Disturb in the Amorphous Phase
11/04/2014US8880980 System and method for expeditious transfer of data from source to destination in error corrected manner
11/04/2014US8880979 Secondary memory to store a varying amount of overhead information
11/04/2014US8880978 Utilizing a local area network memory and a dispersed storage network memory to access data
11/04/2014US8880977 Systems and methods of storing data
11/04/2014US8880974 Memory system and method using ECC with flag bit to identify modified data
11/04/2014US8880964 Block and page level bad bit line and bits screening methods for program algorithm
11/04/2014US8880954 Temperature-profiled device fingerprint generation and authentication from power-up states of static cells
11/04/2014US8880375 Test apparatus and test method
11/04/2014US8879296 Memory system and method using stacked memory device dice
11/04/2014US8879295 Electronic circuit for remapping faulty memory arrays of variable size
11/04/2014US8878592 Simultaneous switching noise cancellation by adjusting reference voltage and sampling clock phase
11/04/2014US8878565 Semiconductor device having impedance calibration function to data output buffer and semiconductor module having the same
11/04/2014US8878304 Fuse circuit for final test trimming of integrated circuit chip
10/2014
10/30/2014US20140325297 Code coverage circuitry
10/30/2014US20140325296 Read-detection in multi-level cell memory
10/30/2014US20140325179 System and method for writing pilot data interspersed with user data for estimating disturbance experienced by user data
10/30/2014US20140321222 Semiconductor memory of which defective cell is replaceable with redundant cell and manufacturing method of semiconductor memory
10/30/2014US20140321220 Semiconductor memory apparatus and method of controlling external voltage using the same
10/30/2014US20140321219 Semiconductor device
10/30/2014US20140321186 Stacked memory with redundancy
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