Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
07/1989
07/18/1989US4849366 Depositing silicon nitride, oxidation, depositing polysilicon, photolithography and etching
07/18/1989US4849364 Semiconductor devices
07/13/1989WO1989006444A2 Vertical power transistor and fabrication methods
07/13/1989WO1989006438A1 Silicon carbide:metal carbide alloy semiconductor and method of making the same
07/13/1989DE3844346A1 Method of production for a Bi-CMOS element using grooves (slots)
07/13/1989DE3743776A1 Buried semiconductor components and method for their production
07/12/1989EP0323936A1 Process for producing an integrated circuit comprising two-level gate devices
07/12/1989EP0323925A1 Charge duplicator for a charge transfer device
07/12/1989EP0323896A2 Complementary semiconductor device
07/12/1989EP0323893A2 Zeolite L
07/12/1989EP0323843A2 Multi-output vertical type power semiconductor device
07/12/1989EP0323714A2 MOS-controlled bidirectional semiconductor switch
07/12/1989EP0323644A1 Polyimide resin and insulating film for electric and electronic devices
07/12/1989EP0323554A1 Ohmic contacts for semiconductor devices and method for forming ohmic contacts
07/12/1989EP0323549A2 Bipolar semiconductor device having a conductive recombination layer
07/12/1989CN1033908A Element for use in electric circuit
07/12/1989CN1004777B Semiconductor integrated circuit device and manufacturing process thereof
07/11/1989US4847808 Read only semiconductor memory having multiple bit cells
07/11/1989US4847692 Solid-state image pickup device with CCDS in an interline transfer system and improved charge transfer electrode structure
07/11/1989US4847675 Heat and migration resistant; gallium-arsenide semiconductor
07/11/1989US4847671 Monolithically integrated insulated gate semiconductor device
07/11/1989US4847670 High performance sidewall emitter transistor
07/11/1989US4847666 Hot electron transistors
07/11/1989US4847212 Self-aligned gate FET process using undercut etch mask
07/11/1989US4847211 Method of manufacturing semiconductor devices and product therefrom
07/11/1989CA1257403A1 Chemical vapour deposition method to produce an electronic device having a multi-layer structure
07/11/1989CA1257393A1 Charge-coupled device
07/06/1989DE3744308A1 Power semiconductor component and method for its production
07/05/1989EP0323249A2 Semiconductor crystal structure and a process for producing the same
07/05/1989EP0323220A2 Hetero junction field effect transistor device
07/05/1989EP0323158A2 Field effect transistor
07/05/1989EP0323156A2 Voltage multiplier circuit
07/05/1989EP0323071A2 Method of fabricating a semiconductor device with low defect density oxide
07/05/1989EP0322962A1 Integrated circuit having a lateral transistor
07/05/1989EP0322961A1 Method of manufacturing a bipolar heterojunction transistor
07/05/1989EP0322960A1 Method of manufacturing a semiconductor device including at least one bipolar heterojunction transistor
07/05/1989EP0322921A2 Method of forming shallow junction and semiconductor device having said shallow junction
07/05/1989EP0322900A2 Electrically erasable programmable read-only memory with NAND cell structure
07/05/1989EP0322886A2 Method for manufacturing semiconductor device
07/05/1989EP0322860A2 Insulated gate semiconductor device
07/05/1989EP0322856A2 Microcomputer
07/05/1989EP0322773A2 Semiconductor device with semimetal
07/05/1989EP0322718A2 Resonant tunneling device
07/05/1989EP0322665A2 Process for manufacturing CMOS integrated devices with reduced gate lengths
07/05/1989EP0322615A1 Method of growing a single crystalline beta-silicon carbide layer on a silicon substrate
07/05/1989EP0322590A2 Thin film semiconductor device
07/05/1989CN1033714A Epitaxial material of gallium phosphide with high luminescence efficiency
07/05/1989CN1004738B Low voltage eeprom cell
07/05/1989CN1004737B Method for silicon planar power transistor dies mfg.
07/05/1989CN1004736B 互补半导体器件 Complementary semiconductor device
07/05/1989CN1004735B 半导体元件 Semiconductor device
07/05/1989CN1004734B Dram cell and method
07/04/1989USH655 Radiation hardening of MISFET devices
07/04/1989US4845680 Nonvolatile semiconductor memory device
07/04/1989US4845541 Tunneling emitter bipolar transistor
07/04/1989US4845538 E2 prom cell including isolated control diffusion
07/04/1989US4845537 Vertical type MOS transistor and method of formation thereof
07/04/1989US4845536 Transistor structure
07/04/1989US4845534 Field effect semiconductor device
07/04/1989US4845533 Thin film electrical devices with amorphous carbon electrodes and method of making same
07/04/1989US4845532 Semiconductor devices
07/04/1989US4845462 Linear integrated resistor
07/04/1989US4845046 Process for producing semiconductor devices by self-alignment technology
07/04/1989US4844776 Method for making folded extended window field effect transistor
07/04/1989US4844587 Flat screens
07/04/1989CA1256996A1 Charge-coupled device
06/1989
06/29/1989WO1989006050A1 Semiconductor heterostructures
06/29/1989WO1989006046A1 Semi-conductive devices fabricated on soi wafers
06/29/1989WO1989006045A1 Polysilicon thin film process and product
06/29/1989WO1989005689A1 Vacuum apparatus
06/29/1989DE3742638A1 GTO thyristor
06/28/1989EP0322380A2 A method for incrementally increasing the collector area of a lateral PNP transistor during electrical testing of an integrated device on wafer
06/28/1989EP0322303A1 Charge transfer device using lowering of the output transfer voltage, and method for making the same
06/28/1989EP0322244A2 Self-limiting mask undercut process
06/28/1989EP0322243A2 Process of manufacture of a gallium arsenide field effect transistor
06/28/1989EP0322161A2 Silicon carbide barrier between silicon substrate and metal layer
06/28/1989EP0322041A2 Integrated high-voltage bipolar power transistor and low voltage MOS power transistor structure in the emitter switching configuration and relative manufacturing process
06/28/1989EP0322040A2 Manufacturing process for a monolithic semiconductor device comprising at least one transistor of an integrated control circuit and one power transistor integrated on the same chip
06/28/1989EP0322002A2 Voltage supply switching device for nonvolatile memories in MOS technology
06/28/1989EP0321953A2 A charge transfer device provided with an improved output stage
06/28/1989EP0321801A1 Turn-off thyristor with overvoltage protection
06/28/1989EP0321738A2 MOS transistor with enhanced isolation capabilities
06/28/1989EP0321533A1 New membrane with selective field effect on metallic or organometallic ions and process for applying this membrane to the transistor
06/28/1989CN1004670B Gate-controlled semiconductor tetrode
06/27/1989US4843473 Charge injection device with low noise readout
06/27/1989US4843450 Compound semiconductor interface control
06/27/1989US4843449 Controllable power semiconductor
06/27/1989US4843447 Hot charge-carrier transistors
06/27/1989US4843444 Magnetic field sensor
06/27/1989US4843443 Thin film field effect transistor and method of making same
06/27/1989US4843442 Method for memorizing a data bit in an integrated mos-type static random access memory cell, a transistor for performing the method, and and the memory so obtained
06/27/1989US4843441 High frequency, high power field effect transistor
06/27/1989US4843440 Microwave field effect transistor
06/27/1989US4843438 Thin film transistor
06/27/1989US4843358 Electrically positionable short-circuits
06/27/1989US4843028 Method for producing a spatially periodic semiconductor layer structure
06/27/1989US4843027 Method of fabricating a high value semiconductor resistor
06/27/1989US4843025 Method of fabricating trench cell capacitors on a semocondcutor substrate
06/27/1989US4843024 High impurity concentration source and drains regions
06/27/1989US4843023 Process for forming lightly-doped-drain (LDD) without extra masking steps