Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143) |
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02/20/1990 | US4902639 Process for making BiCMOS integrated circuit having a shallow trench bipolar transistor with vertical base contacts |
02/20/1990 | US4902638 Thin film transistor, method of repairing the thin film transistor and display apparatus having the thin film transistor |
02/20/1990 | US4902636 Method for manufacturing a depletion type double-diffused metal-oxide semiconductor field effect transistor device |
02/20/1990 | US4902635 Method for production of compound semicondutor devices |
02/20/1990 | US4902633 Process for making a bipolar integrated circuit |
02/20/1990 | US4902582 Aluminum metallized layer formed on silicon wafer |
02/20/1990 | CA1266132A1 Mesfet transistor with air layer between gate electrode connections and substrate |
02/20/1990 | CA1266125A1 Charge-coupled device |
02/20/1990 | CA1265980A1 Gallium arsenide crystal grown on silicon substrate and method of growing such crystal |
02/15/1990 | DE3924278A1 Elektronisches, monolithisch integriertes geraet Electronics, monolithically integrated geraet |
02/14/1990 | EP0354886A1 Methods of producing transistor devices on a semiconductor substructure, and devices produced thereby |
02/14/1990 | EP0354860A1 Highly integrated EPROM device laid out in a grid and having an altered coupling factor and a redundancy capability |
02/14/1990 | EP0354859A1 Highly integrated EPROM laid out in a grid and having an altered coupling factor |
02/14/1990 | EP0354858A1 Large scale integrated EPROM device having a high coupling factor |
02/14/1990 | EP0354765A2 Process for fabricating a bipolar transistor |
02/14/1990 | EP0354478A1 Gate-source protection circuit for power MOSFET |
02/14/1990 | EP0354457A2 A bipolar field-effect electrically erasable programmable read only memory cell and method of manufacture |
02/14/1990 | EP0354454A2 Press-contact flat type semiconductor device |
02/14/1990 | EP0354449A2 Semiconductor single crystal substrate |
02/14/1990 | EP0354372A1 Plurality of thin film field-effect transistors and method of manufacturing the same |
02/13/1990 | US4901134 Polycrystalline silicon connectors |
02/13/1990 | US4901131 Conductivity modulated metal oxide semiconductor field effect transistor |
02/13/1990 | US4901130 Protection thyristor with auxiliary gate |
02/13/1990 | US4901128 Semiconductor memory |
02/13/1990 | US4901127 Circuit including a combined insulated gate bipolar transistor/MOSFET |
02/13/1990 | US4901125 Charge coupled device capable of efficiently transferring charge |
02/13/1990 | US4901124 Conductivity modulated MOSFET |
02/13/1990 | US4901122 Double-base hot carrier transistor |
02/13/1990 | US4901121 Permeable base transistors without lithography of etching |
02/13/1990 | US4901120 Structure for fast-recovery bipolar devices |
02/13/1990 | US4900694 Process for the preparation of a multi-layer stacked junction typed thin film transistor using seperate remote plasma |
02/13/1990 | US4900693 Process for making polysilicon field plate with improved suppression of parasitic transistors |
02/13/1990 | US4900690 MOS semiconductor process with double-layer gate electrode structure |
02/13/1990 | US4900689 Method of fabrication of isolated islands for complementary bipolar devices |
02/13/1990 | US4900687 Process for forming a magnetic field sensor |
02/13/1990 | US4900257 Method of making a polycide gate using a titanium nitride capping layer |
02/08/1990 | WO1990001216A1 Speed-up circuit for npn bipolar transistors |
02/08/1990 | WO1990001215A1 Semiconductor device |
02/07/1990 | EP0354153A2 Vertical bipolar transistor |
02/07/1990 | EP0353719A2 Metal contact with overhanging edges and process of fabrication |
02/07/1990 | EP0353693A2 Compound semiconductor mesfet device |
02/07/1990 | EP0353426A2 Semiconductor integrated circuit device comprising conductive layers |
02/07/1990 | EP0353423A2 Unstrained defect-free epitaxial mismatched heterostructures and method of fabrication |
02/07/1990 | EP0353308A1 Semiconductor device |
02/07/1990 | EP0353271A1 Analog-to-digital converter made with focused ion beam technology. |
02/07/1990 | EP0231326B1 Non-volatile semiconductor memories |
02/06/1990 | US4899202 High performance silicon-on-insulator transistor with body node to source node connection |
02/06/1990 | US4899201 Electronic and optoelectric devices utilizing light hole properties |
02/06/1990 | US4899199 Schottky diode with titanium or like layer contacting the dielectric layer |
02/06/1990 | US4898838 Method for fabricating a poly emitter logic array |
02/06/1990 | US4898836 Process for forming an integrated circuit on an N type substrate comprising PNP and NPN transistors placed vertically and insulated one from another |
02/06/1990 | US4898835 Single mask totally self-aligned power MOSFET cell fabrication process |
02/06/1990 | CA1265626A1 Electron gas hole gas tunneling transistor device |
02/01/1990 | DE3823901A1 Process for fabricating ferro electric solid-state components |
01/31/1990 | EP0353033A2 Rib waveguide type semiconductor laser |
01/31/1990 | EP0352916A2 Planar doped barrier semiconductor devices |
01/31/1990 | EP0352890A2 Field effect devices having shallow junctions |
01/31/1990 | EP0352830A1 Tablecloth matrix of EPROM memory cells individually accessible by a traditional decoder |
01/31/1990 | EP0352801A2 Production method of a semiconductor-on-insulator structure with gettering sites |
01/31/1990 | EP0352769A2 Input protection circuit for MOS device |
01/31/1990 | EP0352516A2 Integrated power transistor comprising means for reducing thermal stresses |
01/31/1990 | EP0352471A2 Method of planarising semiconductor devices |
01/30/1990 | US4897815 High-speed write type nonvolatile semiconductor memory |
01/30/1990 | US4897757 Protection structure for an integrated circuit |
01/30/1990 | US4897710 Semiconductor device |
01/30/1990 | US4897709 Titanium nitride film in contact hole with large aspect ratio |
01/30/1990 | US4897707 Semiconductor device comprising a capacitor and a buried passivation layer |
01/30/1990 | US4897706 Thyristor protected against breakover firing |
01/30/1990 | US4897705 Lateral bipolar transistor for logic circuit |
01/30/1990 | US4897704 Lateral bipolar transistor with polycrystalline lead regions |
01/30/1990 | US4897703 Recessed contact bipolar transistor and method |
01/30/1990 | US4897700 Semiconductor memory device |
01/30/1990 | US4897698 Horizontal structure thin film transistor |
01/30/1990 | US4897360 Annealing a chemically vapor-deposited film to control tensile strain |
01/30/1990 | CA1265258A1 High temperature interconnect system for an integrated circuit |
01/30/1990 | CA1265192A1 Dc voltage multiplier that can be incorporated into a semiconducting structure |
01/25/1990 | WO1990000826A1 Circuit protection arrangement |
01/24/1990 | EP0352193A2 Semiconductor memory device |
01/24/1990 | EP0351677A2 Passivated P-N junction in mesa semiconductor structure |
01/24/1990 | EP0351505A2 Method for passivating a compound semiconductor surface |
01/24/1990 | CN1039152A Method of manufacturing semiconductor device, in which during deposition of metal metal silicide is formed |
01/23/1990 | US4896340 Partial direct injection for signal processing system |
01/23/1990 | US4896295 Eprom memory cell with two symmetrical half-cells and separate floating gates |
01/23/1990 | US4896243 Efficient ESD input protection scheme |
01/23/1990 | US4896203 Heterojunction bipolar transistor |
01/23/1990 | US4896199 Semiconductor device with protective means against overheating |
01/23/1990 | US4896196 Vertical DMOS power transistor with an integral operating condition sensor |
01/23/1990 | US4896194 Semiconductor device having an integrated circuit formed on a compound semiconductor layer |
01/23/1990 | US4895811 Method of manufacturing semiconductor device |
01/23/1990 | US4895810 Improved alignment between layers, semiconductors |
01/23/1990 | US4895520 Method of fabricating a submicron silicon gate MOSFETg21 which has a self-aligned threshold implant |
01/23/1990 | CA1264866A1 Complementary lateral insulated gate rectifiers |
01/23/1990 | CA1264865A1 Semiconductor interconnection structure |
01/17/1990 | EP0351331A1 Integrated-circuit structure for the isolation between components |
01/17/1990 | EP0351320A2 Semiconductor functional element |
01/17/1990 | EP0351316A1 Process for manufacturing an integrated memory-cell |
01/17/1990 | EP0351007A1 Method of manufacturing a semiconductor device, in which isolated conductor tracks are provided on a surface of a semiconductor body |
01/17/1990 | EP0350845A2 Semiconductor device with doped regions and method for manufacturing it |
01/17/1990 | EP0350816A2 Fast power diode and process for manufacturing |
01/17/1990 | EP0350771A2 Electrically erasable, electrically programmable read-only memory cell with a self-aligned tunnel window |