Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
06/1991
06/11/1991US5023195 Method for manufacturing a semiconductor integrated circuit including a bipolar transistor
06/11/1991US5023194 Method of making a multicollector vertical pnp transistor
06/11/1991US5023192 Method of manufacturing a bipolar transistor
06/11/1991US5023191 Method of producing a semiconductor device using a single mask method for providing multiple masking patterns
06/11/1991US5022829 Vacuum apparatus
06/08/1991WO1991009420A1 Method of making silicon quantum wires
06/07/1991CA2031417A1 Method of producing mis transistor having gate electrode of matched conductivity type
06/05/1991EP0430697A2 Improved thin film varactors
06/05/1991EP0430691A2 Semiconductor heterostructures
06/05/1991EP0430595A1 Compound semiconductor device
06/05/1991EP0430592A2 An active matrix display device
06/05/1991EP0430562A1 Semiconductor heterostructure and method of producing the same
06/05/1991EP0430487A2 Matrix addressable displays
06/05/1991EP0430429A2 A process for fabricating a semiconductor device
06/05/1991EP0430426A2 Semiconductor memory device
06/05/1991EP0430418A2 Liquid crystal display and method of manufacturing the same
06/05/1991EP0430363A2 A thin-film transistor circuit
06/05/1991EP0430345A1 Diode devices and active matrix addressed display devices incorporating such
06/05/1991EP0430289A2 Fabrication of self-aligned, T-gate hemt
06/05/1991EP0430279A2 Si/SiGe heterojunction bipolar transistor utilizing advanced epitaxial deposition techniques and method of manufacture
06/05/1991EP0430275A2 Doping method of barrier region in semiconductor device
06/05/1991EP0430237A1 Bipolar device in which carrier lifetime is controlled
06/05/1991EP0430167A2 Method or producing PN junction device
06/05/1991EP0430133A2 Power semiconductor device having emitter shorts
06/05/1991EP0430086A2 Hetero junction bipolar transistor and its manufacturing method
06/05/1991EP0430030A2 Method of forming an insulating film
06/05/1991EP0429979A2 Bandgap tuning of semiconductor quantum well structures
06/05/1991EP0429950A2 Junction field effect transistor and method of fabricating
06/05/1991EP0429834A1 A raised base bipolar transistor structure and its method of fabrication
06/05/1991EP0429696A1 Field-effect transistor with a T-gate
06/05/1991EP0429509A1 Method and apparatus for forming a side wall contact in a nonvolatile electrically alterable memory cell
06/05/1991EP0349633A4 Polysilicon thin film process and product
06/05/1991CN1052006A Semiconductor device and method of manufacturing it
06/05/1991CN1012775B Semiconductor bottom material
06/05/1991CN1012774B Bipolar transistor fabrication utilizing cmos techniques
06/04/1991US5022000 Semiconductor memory device
06/04/1991US5021999 Non-volatile semiconductor memory device with facility of storing tri-level data
06/04/1991US5021920 Multilevel integrated circuit capacitor and method of fabrication
06/04/1991US5021863 Semiconductor quantum effect device having negative differential resistance characteristics
06/04/1991US5021862 Beveled semiconductor silicon wafer and manufacturing method thereof
06/04/1991US5021861 Integrated circuit power device with automatic removal of defective devices and method of fabricating same
06/04/1991US5021860 Integrated device for shielding the injection of charges into the substrate
06/04/1991US5021859 High-frequency amplifying semiconductor device
06/04/1991US5021857 Two dimensional electron gas semiconductor device
06/04/1991US5021855 Multilayer
06/04/1991US5021853 N-channel clamp for ESD protection in self-aligned silicided CMOS process
06/04/1991US5021851 NMOS source/drain doping with both P and As
06/04/1991US5021850 Silicon thin film transistor
06/04/1991US5021849 Compact SRAM cell with polycrystalline silicon diode load
06/04/1991US5021847 Split gate memory array having staggered floating gate rows and method for making same
06/04/1991US5021846 MOS semiconductor device with an inverted U-shaped gate
06/04/1991US5021845 Semiconductor device and process fabrication thereof
06/04/1991US5021844 Semiconductor device
06/04/1991US5021843 Semiconductor integrated circuit
06/04/1991US5021842 Trench DRAM cell with different insulator thicknesses
06/04/1991US5021841 Semiconductor device with controlled negative differential resistance characteristic
06/04/1991US5021840 Schottky or PN diode with composite sidewall
06/04/1991US5021839 FET with a super lattice channel
06/04/1991US5021693 Control circuit for floating gate four-quadrant analog multiplier
06/04/1991US5021365 Compound semiconductor interface control using cationic ingredient oxide to prevent fermi level pinning
06/04/1991US5021363 Method of selectively producing conductive members on a semiconductor surface
06/04/1991US5021361 Epitaxial growth of multilayer
06/04/1991US5021360 Molecular beam epitaxial growth of multilayer
06/04/1991US5021357 Method of making a dram cell with stacked capacitor
06/04/1991US5021356 Method of making MOSFET depletion device
06/04/1991US5021355 Method of fabricating cross-point lightly-doped drain-source trench transistor
06/04/1991CA1284691C Integrated resistance on a semiconductor substrats
06/02/1991CA2031254A1 Doping method of barrier region in semiconductor device
05/1991
05/31/1991CA2031090A1 Bandgap tuning of semiconductor quantum well structures
05/30/1991WO1991007779A1 Silicon bipolar junction transistors
05/30/1991WO1991007778A1 Bipolar junction transistors
05/29/1991EP0429282A2 Thermal protection circuit for a power semiconductor switch
05/29/1991EP0429131A2 Monolithic vertical-type semiconductor power device with a protection against parasitic currents
05/29/1991EP0428916A1 Compression contacted semiconductor device and method for making of the same
05/29/1991EP0428857A2 Eeprom with trench-isolated bitlines
05/29/1991EP0428813A1 Nevice for protection against the short circuit of a MOS-type power device, with a preset dependance on the temperature at which the power device operates
05/29/1991EP0428738A1 Method of making complementary semiconductor integrated circuit devices
05/29/1991DE4017614A1 Topography simulation e.g. for etching semiconductor - uses modified diffusion model having lattice of virtual points in space occupied by workpiece
05/28/1991US5020030 Nonvolatile SNOS memory cell with induced capacitor
05/28/1991US5019943 High density chip stack having a zigzag-shaped face which accommodates connections between chips
05/28/1991US5019890 Heterojunction bipolar transistor
05/28/1991US5019884 Charge transfer device
05/28/1991US5019883 Input protective apparatus of semiconductor device
05/28/1991US5019882 Germanium channel silicon MOSFET
05/28/1991US5019881 Nonvolatile semiconductor memory component
05/28/1991US5019879 Electrically-flash-erasable and electrically-programmable memory storage devices with self aligned tunnel dielectric area
05/28/1991US5019878 Programmable interconnect or cell using silicided MOS transistors
05/28/1991US5019877 Field effect transistor
05/28/1991US5019875 Semiconductor device radiation hardened MESFET
05/28/1991US5019874 Semiconductor device having an epitaxial layer grown heteroepitaxially on an underlying substrate
05/28/1991US5019527 Method of manufacturing non-volatile semiconductor memories, in which selective removal of field oxidation film for forming source region and self-adjusted treatment for forming contact portion are simultaneously performed
05/28/1991US5019524 High resistance semiconductor covering
05/28/1991US5019523 Bipolar transistor
05/28/1991US5019522 Method of making topographic pattern delineated power MOSFET with profile tailored recessed source
05/28/1991US5019520 Short channel between source and drain
05/28/1991US5019001 Method for manufacturing liquid crystal display device
05/25/1991CA2029521A1 Junction field effect transistor and method of fabricating
05/23/1991DE4036958A1 Field concentration suppressing semiconductor structure - has insulating film on first semiconductor zone end section between it and conductive layer
05/23/1991DE3937329A1 Semiconductor component with heterostructure - has layers of at least partly doped silicon, germanium and-or their alloys
05/23/1991CA2026980A1 Method and apparatus for sensing thermal stress in integrated circuits
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