Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
11/1998
11/24/1998US5841162 Non-volatile semiconductor memory with floating gate and control gate and fabrication process therefor
11/24/1998US5841161 Flash memory and method for fabricating the same
11/24/1998US5841156 Quantum well laser, transistor; improved lattice constant
11/24/1998US5841155 Semiconductor device containing two joined substrates
11/24/1998US5840626 Semiconductor device and method of manufacturing the same
11/24/1998US5840618 Method of manufacturing semiconductor device using an amorphous material
11/24/1998US5840613 Fabrication method for semiconductor device
11/24/1998US5840612 Providing vertical integrated device having substrate, collector, base, emitter layers, forming photoresist, etching, exposing, developing, forming metal contacts
11/24/1998US5840611 Forming insulating layer on substrate, forming conductive layer, patterning, etching, doping, removing etch pattern, oxidizing, doping, heating
11/24/1998US5840610 Enhanced oxynitride gate dielectrics using NF3 gas
11/24/1998US5840609 Method of manufacturing semiconductor device having stacked gate electrode structure
11/24/1998US5840607 Forming tunnel oxide layer on substrate, forming floating gate layer by sequentially forming undoped polysilicon layer, doped polysilicon layer, forming dielectric layer, gate, oxide layer, patterning
11/24/1998US5840604 Methods of forming MOS transistors having hot-carrier suppression electrodes
11/24/1998US5840602 Methods of forming nonmonocrystalline silicon-on-insulator thin-film transistors
11/24/1998US5840601 Thin film transistor and method for making same
11/24/1998US5840596 Forming undoped and doped silicon or silicon alloy layers, forming n-channel transistor, forming p-channel transistor, forming electrodes
11/24/1998US5840593 Membrane dielectric isolation IC fabrication
11/24/1998US5840110 Metal alkoxycarboxylate-based liquids
11/19/1998WO1998052232A1 A PN-DIODE OF SiC AND A METHOD FOR PRODUCTION THEREOF
11/19/1998WO1998052231A1 Reduce width, differentially doped vertical jfet device
11/19/1998WO1998052230A2 Silicongermanium semiconductor device and a method of manufacturing the same
11/19/1998WO1998052215A1 Spacer structure as transistor gate
11/19/1998WO1998052051A1 Acceleration sensor
11/19/1998WO1998051819A1 Methods for electronic fluorescent perturbation for analysis and electronic perturbation catalysis for synthesis
11/19/1998DE19811046A1 Electronic device with Schottky contact
11/19/1998DE19800089A1 Transistor-containing semiconductor device e.g. memory device
11/19/1998DE19750918A1 Semiconductor device especially DRAM cell
11/19/1998DE19731090C1 Thin film transistor active matrix production
11/18/1998EP0878849A2 Power diode
11/18/1998EP0878848A1 Vertical bipolar semiconductor power transistor with an interdigitised geometry, with optimisation of the base-to-emitter potential difference
11/18/1998EP0878837A2 Ferroelectric thin film comprising a bufferlayer and a Bismuth layered compound
11/18/1998EP0878835A1 Etching method for silicon substrate
11/18/1998EP0878025A1 Semiconductor device with a high-frequency bipolar transistor on an insulating substrate
11/18/1998EP0878022A1 Method for forming ultra-thin gate oxides
11/18/1998EP0842455A4 Improved tft, method of making and matrix displays incorporating the tft
11/18/1998EP0786148A4 Radiation hardened charge coupled device
11/18/1998EP0720748B1 Integrated micromechanical sensor device and process for producing it
11/18/1998CN1199248A Semiconductor device and mfg. method thereof
11/18/1998CN1199245A Method of forming integrated circuit capacitors and capacitors formed thereby
11/18/1998CN1040814C Surface voltage-withstand zone for semiconductor device
11/17/1998US5838617 Method for changing electrically programmable read-only memory devices
11/17/1998US5838616 Gate edge aligned EEPROM transistor
11/17/1998US5838615 Nonvolatile semiconductor memory device having reduced source line resistance
11/17/1998US5838611 Nonvolatile semiconductor device and method of manufacturing same
11/17/1998US5838399 TFT active matrix liquid crystal display devices with two layer gate lines, the first being the same level as gate electrodes.
11/17/1998US5838110 Powered by an ac supply source
11/17/1998US5838068 Integrated circuitry with interconnection pillar
11/17/1998US5838058 Semiconductor substrate and semiconductor device employing the same
11/17/1998US5838049 Tungsten
11/17/1998US5838048 Semiconductor Bi-MIS device
11/17/1998US5838042 DMOS device structure, and related manufacturing process
11/17/1998US5838041 Nonvolatile semiconductor memory device having memory cell transistor provided with offset region acting as a charge carrier injecting region
11/17/1998US5838040 Nonvolatile reprogrammable interconnect cell with FN tunneling in sense
11/17/1998US5838039 Semiconductor memory having a tunneling region
11/17/1998US5838037 TFT-array and manufacturing method therefor
11/17/1998US5838035 Barrier layer for ferroelectric capacitor integrated on silicon
11/17/1998US5838034 Excellent pyroelectric properties, lead titanate for ferroelectric thin film
11/17/1998US5838033 Integrated circuit with gate conductor defined resistor
11/17/1998US5838030 GaInP/GaInAs/GaAs modulation-compositioned channel field-effect transistor
11/17/1998US5838027 Semiconductor device and a method for manufacturing the same
11/17/1998US5838026 Insulated-gate semiconductor device
11/17/1998US5838021 Single electron digital circuits
11/17/1998US5838019 Electron emitting element
11/17/1998US5837605 Manufacturing method of transistors
11/17/1998US5837601 Implanting dopant impurities to equal concentrations at both sides of interface between gate electrode and silicide electrode to prevent impurity diffusion during heat treatment; complementary metal oxide semiconductors (cmos)
11/17/1998US5837600 Heat treatment to simultaneously crystallize and partially oxidize bilayered tungsten silicide coated over polysilicon layer covering gate oxide layer without diffusion of any fluorine into the gate oxide
11/17/1998US5837598 Surface treatment of thin silicon layer covering gate oxide of metal oxide semiconductor (mos) device by exposure to nitrogen plasma, then selectively doping subsequently deposited polysilicon gate electrode layer, annealing
11/17/1998US5837597 Method of manufacturing semiconductor device with shallow impurity layers
11/17/1998US5837590 Isolated vertical PNP transistor without required buried layer
11/17/1998US5837588 Method for forming a semiconductor device with an inverse-T gate lightly-doped drain structure
11/17/1998US5837585 Method of fabricating flash memory cell
11/17/1998US5837584 Virtual ground flash cell with asymmetrically placed source and drain and method of fabrication
11/17/1998US5837583 Method of forming separated floating gate for EEPROM application
11/17/1998US5837571 Doping substrate through mask pattern of parallel windows of varying widths to form source or drain regions having gradient dopant profile with thickness decreasing towards gate region; complementary metal oxide semiconductor (cmos)
11/17/1998US5837570 Heterostructure semiconductor device and method of fabricating same
11/17/1998US5837569 Annealing to crystallize patterned region of amorphous silicon substrate surface selectively seeded with crystallization promoter, further processing to form thin film transistor
11/17/1998US5837568 Precision controlled small dose doping of semiconductor substrate region followed by broadly large dose doping of other substrate regions for simplified formation of thin film transistor
11/17/1998US5837566 Vertical interconnect process for silicon segments
11/17/1998US5837565 Molecular beam epitaxy to form field effect transistor having undoped gallium arsenide sequentially coated with undoped intermediate layers and gallium aluminum arsenide top layer; high electron mobility
11/17/1998US5837563 Self aligned barrier process for small pixel virtual phase charged coupled devices
11/17/1998US5837559 Method of producing an electro-optical device
11/17/1998US5837554 Integrated circuit with EPROM cells
11/17/1998US5837056 Method for growing III-V group compound semiconductor crystal
11/17/1998US5836772 Interpoly dielectric process
11/12/1998WO1998050961A1 Heterojunction bipolar transistor having heterostructure ballasting emitter
11/12/1998WO1998050960A1 Floating gate memory cell with charge leakage prevention
11/12/1998WO1998050959A1 Semiconductor component
11/12/1998WO1998050958A1 Device based on quantic islands and method for making same
11/12/1998WO1998050957A1 Mos gate controllable power electronics component
11/12/1998DE19810338A1 IGBT with latch-up prevention and short circuit strength
11/12/1998DE19800179A1 Transistor-containing semiconductor device e.g. memory device
11/12/1998DE19719779A1 Beschleunigungssensor Acceleration sensor
11/12/1998DE19719699A1 High density dynamic random access memory formation
11/12/1998DE19719165A1 Halbleiterbauelement Semiconductor device
11/12/1998CA2259631A1 Floating gate memory cell with charge leakage prevention
11/11/1998EP0877422A1 Dual-level metalization method for integrated circuit ferroelectric devices
11/11/1998EP0877256A1 Method of manufacturing sensor
11/11/1998EP0877100A1 Process for fabricating solid-solution of layered perovskite materials
11/11/1998EP0876681A1 Semiconductor neuron with variable input weights
11/11/1998EP0876509A1 Methods for generating polynucleotides having desired characteristics by iterative selection and recombination